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[209.132.180.67]) by mx.google.com with ESMTP id c20-v6si7409513pls.557.2018.05.13.06.33.57; Sun, 13 May 2018 06:34:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=GH72xJaH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751584AbeEMNdo (ORCPT + 99 others); Sun, 13 May 2018 09:33:44 -0400 Received: from mail-qk0-f169.google.com ([209.85.220.169]:36514 "EHLO mail-qk0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751270AbeEMNdm (ORCPT ); Sun, 13 May 2018 09:33:42 -0400 Received: by mail-qk0-f169.google.com with SMTP id l132-v6so7996441qke.3; Sun, 13 May 2018 06:33:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=HHcPxS8+m7lhucRg+mYTPVg5ml/zFQkCKUsrdNNI5vw=; b=GH72xJaHmhceIOFUDUKEPVsptjNF3nbefxXxOfS3kjzYeFSjgLG2jB6T3Yhx9ryQHU 9TJiWVH6caFOtNkTauUpGO8mECfj64pfSB7PsD4t3MLpnaIqJNmJFZWlXR2b5tDiu1kS yD4VpzDkBSk2E6Uu3G2RYdG78QeF3yeEBoZevveoGvNPSJR/XqZJFAG3PCEWa2F3hlYk vDTvRBegjLvwNAvrcPQr+CaOMrMjq9miJsAFbCdKzDGqdUIWVd3nPU3FejQ0Ehj8cjpn uUJNCzrRNoeAq7fUB032Xip65ZVyDRIl7kEO0oJYMrQRZ967GW62geanm7Ueq+Bi0shW WHBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=HHcPxS8+m7lhucRg+mYTPVg5ml/zFQkCKUsrdNNI5vw=; b=gcFhKkr/WqTdpcs+JcgGRartosn4gD9Ckv4pTaPUkh9+tcYThPsbq4XZUtnp20auZP DvStbuORhtdSNVuew6jzJhL6JnAPUPvm9ME+k43qWEf3U6TaQlTteMgiBJDFxkC+V9q5 ddf1Ai+91jqe27QiIHXoGmZ3/cOtrhEjNSpdzBJC4RFhpeU+HAD9xI1kBKSF5+SO7jr4 uZe2A/BztLa6sk6MLUeoXJhC18bBZ6b/KkrLmO9cHHIyZmt9q4JMH2ZFEMYhh0TvQ2pW 5TILH2emXbWs+AToPypp/B5sHbl0xhUR/a2owNvLYO8LPAjfawFJWxYTDii65ziqJ3qJ mrYQ== X-Gm-Message-State: ALKqPwft0NH/7vXJIia4ZiScV2ETqbQg19E3kctto+GR7TbTiBVGeFXn 2WU6CPHz/hihT95BHEwbK0G1b32qTEI6e73CpaE= X-Received: by 2002:a37:d1d3:: with SMTP id o80-v6mr4882712qkl.3.1526218420926; Sun, 13 May 2018 06:33:40 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.152.150 with HTTP; Sun, 13 May 2018 06:33:40 -0700 (PDT) In-Reply-To: <20180511103822.31698-6-radu.pirea@microchip.com> References: <20180511103822.31698-1-radu.pirea@microchip.com> <20180511103822.31698-6-radu.pirea@microchip.com> From: Andy Shevchenko Date: Sun, 13 May 2018 16:33:40 +0300 Message-ID: Subject: Re: [PATCH v3 5/6] spi: at91-usart: add driver for at91-usart as spi To: Radu Pirea Cc: devicetree , "open list:SERIAL DRIVERS" , Linux Kernel Mailing List , linux-arm Mailing List , linux-spi , Mark Rutland , Rob Herring , Lee Jones , Greg Kroah-Hartman , Jiri Slaby , Richard Genoud , alexandre.belloni@bootlin.com, Nicolas Ferre , Mark Brown Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 11, 2018 at 1:38 PM, Radu Pirea wrote: > This is the driver for at91-usart in spi mode. The USART IP can be configured > to work in many modes and one of them is SPI. > +#include > +#include Here is something wrong. You need to use latter one in new code. > +#include > +#include > +#include > +#include > +#include > +#include > +#include Hmm... Do you need all of them? > +static inline void at91_usart_spi_cs_activate(struct spi_device *spi) > +{ ... > + gpiod_set_value(ausd->npcs_pin, active); > + aus->cs_active = true; > +} > + > +static inline void at91_usart_spi_cs_deactivate(struct spi_device *spi) > +{ ... > + gpiod_set_value(ausd->npcs_pin, !active); > + aus->cs_active = false; > +} ... > + if (!ausd) { > + if (gpio_is_valid(spi->cs_gpio)) { > + npcs_pin = gpio_to_desc(spi->cs_gpio); ... > + } ... > + gpiod_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH)); > + > + ausd->npcs_pin = npcs_pin; ... > + } I will refer to above as (1) later on. > + dev_dbg(&spi->dev, "new message %p submitted for %s\n", > + msg, dev_name(&spi->dev)); %p does make a very little sense. > + list_for_each_entry(xfer, &msg->transfers, transfer_list) { > + ret = at91_usart_spi_one_transfer(controller, msg, xfer); > + if (ret) > + goto msg_done; > + } Cant SPI core do this for your? > +static void at91_usart_spi_cleanup(struct spi_device *spi) > +{ > + struct at91_usart_spi_device *ausd = spi->controller_state; > + > + if (!ausd) > + return; Is it even possible? Anyway the code below will work fine even if it's the case. > + > + spi->controller_state = NULL; > + kfree(ausd); > +} > +static int at91_usart_spi_gpio_cs(struct platform_device *pdev) > +{ > + struct spi_controller *controller = platform_get_drvdata(pdev); > + struct device_node *np = controller->dev.parent->of_node; > + struct gpio_desc *cs_gpio; > + int nb; > + int i; > + > + if (!np) > + return 0; > + > + nb = of_gpio_named_count(np, "cs-gpios"); > + for (i = 0; i < nb; i++) { > + cs_gpio = devm_gpiod_get_from_of_node(&pdev->dev, > + pdev->dev.parent->of_node, > + "cs-gpios", > + i, GPIOD_OUT_HIGH, > + dev_name(&pdev->dev)); > + if (IS_ERR(cs_gpio)) > + return PTR_ERR(cs_gpio); > + } > + > + controller->num_chipselect = nb; > + > + return 0; > +} The question is, why you didn't utilize what SPI core provides you? > + spi_writel(aus, MR, US_MR_SPI_MASTER | US_MR_CHRL | US_MR_CLKO | > + US_MR_WRDBT); > + spi_writel(aus, CR, US_CR_RXDIS | US_CR_TXDIS | US_CR_RSTRX | > + US_CR_RSTTX); I didn't check over, but it seems like you might have duplication in these bitwise ORs. Consider to unify them into another (shorter) definitions and reuse all over the code. > + regs = platform_get_resource(to_platform_device(pdev->dev.parent), > + IORESOURCE_MEM, 0); > + if (!regs) > + return -ENXIO; Strange error code for getting MMIO resource. ENOMEM sounds better. > + dev_info(&pdev->dev, > + "Atmel USART SPI Controller version 0x%x at 0x%08lx (irq %d)\n", > + spi_readl(aus, VERSION), > + (unsigned long)regs->start, irq); If you do explicit casting when printing something you are doing wrong. Please use %pR or %pr in this case. > +static struct platform_driver at91_usart_spi_driver = { > + .driver = { > + .name = "at91_usart_spi", > + .of_match_table = of_match_ptr(at91_usart_spi_dt_ids), Can it work as pure platform driver? If no, of_match_ptr() is redundant. > + }, > + .probe = at91_usart_spi_probe, > + .remove = at91_usart_spi_remove, }; Two lines at one. Split. -- With Best Regards, Andy Shevchenko