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[209.132.180.67]) by mx.google.com with ESMTP id n9-v6si7135452pgq.470.2018.05.14.01.57.08; Mon, 14 May 2018 01:57:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XNU2+vEU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752190AbeENI4i (ORCPT + 99 others); Mon, 14 May 2018 04:56:38 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:41593 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752163AbeENI4d (ORCPT ); Mon, 14 May 2018 04:56:33 -0400 Received: by mail-pl0-f65.google.com with SMTP id az12-v6so6964968plb.8 for ; Mon, 14 May 2018 01:56:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=2Qu1jnyodM33FX6lpiVLTbtDw5ni5cVDxwCgCDaodfs=; b=XNU2+vEU9pkOF50orsNJJ5kxL+oDeoSRglRc+u/p7NKdFFCyrSamXC91u8InWTxbEA uqTUvbStGgLkCr1QJI/DEgrgD7izDGiCMg3m70gbvdZcH4NB5gksohRNSyIMuRd1dpxq TuMOzFm2p1lR13tKYEb3VqKGGeH7sUVEDTymU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=2Qu1jnyodM33FX6lpiVLTbtDw5ni5cVDxwCgCDaodfs=; b=J8LZczWSiLXqsDSfn0ksObs9vUdKhHMLu7teMdnfwnEchIsCl/zdw6FpJxheYtpK3M K6JALFMNUCdT7L6WSA0bgJTBDmAY3eMewhX1Nbx2/rPgKHpNS3DVn03sS8dFMBaxcnUt 2GsQG8wqjRQ2Q42rdeAdiSMMfuriajzcdfUG7hPcse0tHHtwBrH7TNTgJ56GYS2Vvj1q c6Fk4RPAr6LN8RiUjr/L1lZh7e61IROV3NwGOWcJe+/7BtugVkzi5Krc9Zw3l0HZ2Qwv lyjkdjHGXaBZ+ShbjXGNS+vSqoQIK/8o0zl2m9lUzxDQoUJaJRl+t1qqb3GrnX6je7x9 Qa4Q== X-Gm-Message-State: ALKqPwfvNF034AY0T+eafBq7n00aM4KzSwr27awf/Ri1AQtNw6ElGQYg QS0x/pajn0iTndg5Pj7Xzv/0Ag== X-Received: by 2002:a17:902:76c3:: with SMTP id j3-v6mr5763144plt.15.1526288193314; Mon, 14 May 2018 01:56:33 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id x71-v6sm23308158pfe.47.2018.05.14.01.56.25 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 May 2018 01:56:32 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [RFC PATCH 03/10] arm: omap: Convert 32K counter to use persistent clock Date: Mon, 14 May 2018 16:55:29 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We have introduced the persistent clock framework to support the OS time compensating from persistent clock, so this patch converts the 32k counter to use persistent clock framework to save lots of duplicate code. Signed-off-by: Baolin Wang --- arch/arm/plat-omap/Kconfig | 1 + arch/arm/plat-omap/counter_32k.c | 44 ++++++-------------------------------- 2 files changed, 8 insertions(+), 37 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index afc1a1d..0e4e385 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 config ARCH_OMAP + select PERSISTENT_CLOCK bool if ARCH_OMAP diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 2438b96..5d52f7c 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -19,8 +19,7 @@ #include #include #include - -#include +#include #include @@ -44,33 +43,6 @@ static u64 notrace omap_32k_read_sched_clock(void) } /** - * omap_read_persistent_clock64 - Return time from a persistent clock. - * - * Reads the time from a source which isn't disabled during PM, the - * 32k sync timer. Convert the cycles elapsed since last read into - * nsecs and adds to a monotonically increasing timespec64. - */ -static struct timespec64 persistent_ts; -static cycles_t cycles; -static unsigned int persistent_mult, persistent_shift; - -static void omap_read_persistent_clock64(struct timespec64 *ts) -{ - unsigned long long nsecs; - cycles_t last_cycles; - - last_cycles = cycles; - cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; - - nsecs = clocksource_cyc2ns(cycles - last_cycles, - persistent_mult, persistent_shift); - - timespec64_add_ns(&persistent_ts, nsecs); - - *ts = persistent_ts; -} - -/** * omap_init_clocksource_32k - setup and register counter 32k as a * kernel clocksource * @pbase: base addr of counter_32k module @@ -95,13 +67,6 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) else sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW; - /* - * 120000 rough estimate from the calculations in - * __clocksource_update_freq_scale. - */ - clocks_calc_mult_shift(&persistent_mult, &persistent_shift, - 32768, NSEC_PER_SEC, 120000); - ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, 250, 32, clocksource_mmio_readl_up); if (ret) { @@ -110,7 +75,12 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); - register_persistent_clock(NULL, omap_read_persistent_clock64); + /* + * 120000 rough estimate from the calculations in + * __clocksource_update_freq_scale. + */ + persistent_clock_init_and_register(omap_32k_read_sched_clock, + CLOCKSOURCE_MASK(32), 32768, 120000); pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); return 0; -- 1.7.9.5