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[209.132.180.67]) by mx.google.com with ESMTP id p73-v6si9609935pfk.275.2018.05.14.07.17.11; Mon, 14 May 2018 07:17:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=o2SZb+b8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753879AbeENOQv (ORCPT + 99 others); Mon, 14 May 2018 10:16:51 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:37754 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752207AbeENOQs (ORCPT ); Mon, 14 May 2018 10:16:48 -0400 Received: by mail-wr0-f196.google.com with SMTP id h5-v6so12540722wrm.4 for ; Mon, 14 May 2018 07:16:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=message-id:subject:from:to:cc:date:in-reply-to:references :mime-version:content-transfer-encoding; bh=iDGIVXSXEZ9ivOp8LzhrWmL2dMvOd2gy1Yv4EY4R0fI=; b=o2SZb+b8Odl/isQsYbTL9nhUJfACtOBU3THBCZA1NPQUjtHHqu1tG4zquFxAXBUmv8 KDoBn701hjX64Gcyug+6V+FoJkG2imOL1EX/Gaz0jWAe5+wTG44MX766IS2gWpSSsh0g 8NfKaXN2jq7KoLluELDMWOBS1X5+VzRZOw2k+1VUTAZJ9wdULwDqELrsMVxIq91gy9yq ZllkswiFuwIyBOayftvT6Vfm/zLNu05N3P+nTtg7Q96GiHKpyCsodFjt0/HltjSPq8mt E2FAqak8dLDfZlNPIBwOg4fDH2hfgkizvy5tg4khBZRLVWJO+tecBAwc/MFnV4/h9kge R0IA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:subject:from:to:cc:date:in-reply-to :references:mime-version:content-transfer-encoding; bh=iDGIVXSXEZ9ivOp8LzhrWmL2dMvOd2gy1Yv4EY4R0fI=; b=h3+PYoY/M6Kzxv7knOCv3OBGR6JGikqvKyFxokZSKCOMj+7UZ2FPVQn+JSqJLZqegO +C274MpbJmVr8ZJ5RWQQDpQLrXO6bLZVG3IQu9+Uka6Xe2/DwyOS6viZ4pTV5enUqIZv F44H9aATXdUMFEhwo5fqtL0ET1DhoHogu8Or9TEkdkYkcvEyf//gs+AIalqgfoxaR7KE L6C/in9eIMkgWfSMHHCMfn9G7kty5h2BN53RJF0F3cSljTu5IDeBOPNV1gGoyGCDeoVv 3teRsdJuLC5BLeZAf2Tzu9jSU1v9tYHzFzCB5YxdVczacHrbqQI0VNfEqcEC4U7lXuu3 dTuA== X-Gm-Message-State: ALKqPweCtLLK169OI3ag0zIPFwW8MpIBSdL7HE6ryloiXtd2GIPl29wI eYeE0sK1AeM8Z+uv0OQWW1KuzA== X-Received: by 2002:adf:8e27:: with SMTP id n36-v6mr6955557wrb.27.1526307407547; Mon, 14 May 2018 07:16:47 -0700 (PDT) Received: from boomer ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id n71-v6sm13592567wmi.14.2018.05.14.07.16.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 May 2018 07:16:46 -0700 (PDT) Message-ID: <1526307405.2897.29.camel@baylibre.com> Subject: Re: [PATCH 6/7] clk: meson: axg: document bindings for the audio clock controller From: Jerome Brunet To: Rob Herring Cc: Neil Armstrong , Carlo Caione , Kevin Hilman , Michael Turquette , Stephen Boyd , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Mon, 14 May 2018 16:16:45 +0200 In-Reply-To: <20180501143715.GA20023@rob-hp-laptop> References: <20180425163304.10852-1-jbrunet@baylibre.com> <20180425163304.10852-7-jbrunet@baylibre.com> <20180501143715.GA20023@rob-hp-laptop> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2018-05-01 at 09:37 -0500, Rob Herring wrote: > On Wed, Apr 25, 2018 at 06:33:03PM +0200, Jerome Brunet wrote: > > Add documentation for the device tree bindings of the audio clock > > controller of the A113 based SoCs > > > > The preferred subject prefix for bindings is 'dt/bindings: clock: ...' Noted, I suppose meant 'dt-bindings: clocks: ..." which seems to used half of the times The rest use 'clk: {platform}: ...' > > > Signed-off-by: Jerome Brunet > > --- > > .../bindings/clock/amlogic,axg-audio-clkc.txt | 56 ++++++++++++++++++++++ > > 1 file changed, 56 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > > > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > > new file mode 100644 > > index 000000000000..1b989ceda567 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > > @@ -0,0 +1,56 @@ > > +* Amlogic AXG Audio Clock Controllers > > + > > +The Amlogic AXG audio clock controller generates and supplies clock to the > > +other elements of the audio subsystem, such as fifos, i2s, spdif and pdm > > +devices. > > + > > +Required Properties: > > + > > +- compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D > > +- reg : physical base address of the clock controller and length of > > + memory mapped region. > > +- clocks : a list of phandle + clock-specifier pairs for the clocks listed > > + in clock-names. > > +- clock-names : must contain the following: > > + * "pclk" - Main peripheral bus clock > > + may contain the following: > > + * "mst_in[0-7]" - 8 input plls to generate clock signals > > Unless the sources don't exist, then you should always have the clocks. > It should not be based on whether you are using them or not. This is not really the point. The parent controller may or may not provide some of the PLL. This was the case during the development of the controller when the HIFI pll was not available simply because there was no driver for it. Whatever the reason for an input clock to be missing, this clock controller may continue to serve its purpose even if some input plls are not provided/available which is why these are not "mandatory" > > > + * "slv_sclk[0-9]" - 10 slave bit clocks provided by external > > + components. > > + * "slv_lrclk[0-9]" - 10 slave sample clocks provided by external > > + components. > > I'm guessing these may come from pins that aren't connected, so being > optional is fine. > > > +- reset : phandle of the internal reset line > > resets > > > +- #clock-cells : should be 1. > > + > > +Each clock is assigned an identifier and client nodes can use this identifier > > +to specify the clock which they consume. All available clocks are defined as > > +preprocessor macros in the dt-bindings/clock/axg-audio-clkc.h header and can be > > +used in device tree sources. > > + > > +Example: > > + > > +clkc_audio: clock-controller { > > Needs a unit address. > > > + compatible = "amlogic,axg-audio-clkc"; > > + reg = <0x0 0x0 0x0 0xb4>; > > + #clock-cells = <1>; > > + > > + clocks = <&clkc CLKID_AUDIO>, > > + <&clkc CLKID_MPLL0>, > > + <&clkc CLKID_MPLL1>, > > + <&clkc CLKID_MPLL2>, > > + <&clkc CLKID_MPLL3>, > > + <&clkc CLKID_HIFI_PLL>, > > + <&clkc CLKID_FCLK_DIV3>, > > + <&clkc CLKID_FCLK_DIV4>, > > + <&clkc CLKID_GP0_PLL>; > > + clock-names = "pclk", > > + "mst_in0", > > + "mst_in1", > > + "mst_in2", > > + "mst_in3", > > + "mst_in4", > > + "mst_in5", > > + "mst_in6", > > + "mst_in7"; > > + resets = <&reset RESET_AUDIO>; > > +}; > > -- > > 2.14.3 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe devicetree" in > > the body of a message to majordomo@vger.kernel.org > > More majordomo info at http://vger.kernel.org/majordomo-info.html