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[209.132.180.67]) by mx.google.com with ESMTP id c86-v6si10355068pfl.319.2018.05.14.10.03.18; Mon, 14 May 2018 10:03:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=H58xvskq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754181AbeENO62 (ORCPT + 99 others); Mon, 14 May 2018 10:58:28 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:40516 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752696AbeENO6X (ORCPT ); Mon, 14 May 2018 10:58:23 -0400 Received: by mail-yw0-f194.google.com with SMTP id p144-v6so3664852ywg.7 for ; Mon, 14 May 2018 07:58:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=LZkQVvOGMiBLJvo4wh23ypdNL83NS42JAvOB0Bmac/g=; b=H58xvskq5j+YH+/kY8hlU0v/j1jLADRcQIxSJ9FZfvNttUW2KMifOAvzaJk01BnPaE EkAnoWk3WvXBCibgmgA73jZ/wfXb/qL3kfAKrEVgP/sRZvlELyVUZQ1Iq2lZ8M2FNd+P K7PzO1ZsTcUymKSEZ96wmwHlpB6cMZ8vvp3jk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=LZkQVvOGMiBLJvo4wh23ypdNL83NS42JAvOB0Bmac/g=; b=HOU28K2YIHWJiGYaFumjoR9Kp72mWvq9SOAcJ+8iHs+UHz4o5IQOqm24MIhxogxdb6 qKcCkZo4BSoKFQNsqphVn/Buw8AV+AsujQ9G6PNBbptGeTicRaD4IgNNJp6gvmhosWRd yDFwfVmueFL8gvdibc71+MESbmfCn+Bl9+ZS9qvCHCNDZN+0On0uh/cHQ0AR9iUVUu01 ng0+dhz5L+RcUdJs83NkZpfWzA7al34sM8hYmmPIXdqi9EpH5rjJpoeZeoKG/MV1xEOv IU/7qv2Wl1AiHlMjMI727nz6hKyoRF9dlmTWWYunDpbgdaNV4FjqkOk2OcD6urxEPrPV 0JUg== X-Gm-Message-State: ALKqPweUyXPHNjjId5G+2t6ChagVnvyPeMRlHrMFKkWggzcUrsJTSAuA oLkF+LK94Q5HooxTGLFyjujXlQ== X-Received: by 2002:a0d:f1c2:: with SMTP id a185-v6mr4521300ywf.460.1526309902158; Mon, 14 May 2018 07:58:22 -0700 (PDT) Received: from localhost ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id w200-v6sm4288076yww.61.2018.05.14.07.58.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 May 2018 07:58:21 -0700 (PDT) Date: Mon, 14 May 2018 10:58:21 -0400 From: Sean Paul To: Lin Huang Cc: seanpaul@chromium.org, airlied@linux.ie, zyw@rock-chips.com, dianders@chromium.org, briannorris@chromium.org, linux-rockchip@lists.infradead.org, heiko@sntech.de, daniel.vetter@intel.com, jani.nikula@linux.intel.com, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, eballetbo@gmail.com, robh+dt@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 3/4] phy: rockchip-typec: support variable phy config value Message-ID: <20180514145821.GB3373@art_vandelay> References: <1526291635-31122-1-git-send-email-hl@rock-chips.com> <1526291635-31122-3-git-send-email-hl@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1526291635-31122-3-git-send-email-hl@rock-chips.com> User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 14, 2018 at 05:53:54PM +0800, Lin Huang wrote: > the phy config values used to fix in dp firmware, but some boards > need change these values to do training and get the better eye diagram > result. So support that in phy driver. > > Signed-off-by: Chris Zhong > Signed-off-by: Lin Huang > --- > Changes in v2: > - update patch following Enric suggest > Changes in v3: > - delete need_software_training variable > - add default phy config value, if dts do not define phy config value, use these value > > drivers/phy/rockchip/phy-rockchip-typec.c | 305 ++++++++++++++++++++---------- > include/soc/rockchip/rockchip_phy_typec.h | 63 ++++++ > 2 files changed, 270 insertions(+), 98 deletions(-) > create mode 100644 include/soc/rockchip/rockchip_phy_typec.h > > diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c > index 76a4b58..10253ad 100644 > --- a/drivers/phy/rockchip/phy-rockchip-typec.c > +++ b/drivers/phy/rockchip/phy-rockchip-typec.c /snip > > +/* default phy config */ > +struct phy_config configs[3][4] = { static const Also, configs isn't a good name. How about tcphy_default_config? > + {{ 0x2a, 0x00 }, Can you please expand the assignment for all of these, ie: { .swing = 0x2a, .pe = 0x00 }, > + { 0x1f, 0x15 }, > + { 0x14, 0x22 }, > + { 0x02, 0x2b } }, > + > + {{ 0x21, 0x00 }, > + { 0x12, 0x15 }, > + { 0x02, 0x22 }, > + { 0, 0 } }, > + > + {{ 0x15, 0x00 }, > + { 0x00, 0x15 }, > + { 0, 0 }, > + { 0, 0 } }, > +}; > + /snip -- Sean Paul, Software Engineer, Google / Chromium OS