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[209.132.180.67]) by mx.google.com with ESMTP id d12-v6si11309954plo.551.2018.05.15.01.39.53; Tue, 15 May 2018 01:40:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752343AbeEOIjj (ORCPT + 99 others); Tue, 15 May 2018 04:39:39 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:7090 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752054AbeEOIjh (ORCPT ); Tue, 15 May 2018 04:39:37 -0400 X-UUID: ef886386cd1d483eabbac8d6d6b477e0-20180515 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1389543993; Tue, 15 May 2018 16:39:33 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 15 May 2018 16:39:31 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 15 May 2018 16:39:31 +0800 Message-ID: <1526373571.3345.3.camel@mtksdaap41> Subject: Re: [PATCH v2 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile From: Erin Lo To: Marc Zyngier CC: Matthias Brugger , Rob Herring , Mark Rutland , Thomas Gleixner , Jason Cooper , "Greg Kroah-Hartman" , , srv_heupstream , , , , , , , Ben Ho , Hailong Fan Date: Tue, 15 May 2018 16:39:31 +0800 In-Reply-To: References: <1526293351-32794-1-git-send-email-erin.lo@mediatek.com> <1526293351-32794-5-git-send-email-erin.lo@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2018-05-14 at 11:35 +0100, Marc Zyngier wrote: > On 14/05/18 11:22, Erin Lo wrote: > > From: Ben Ho > > > > Add basic chip support for Mediatek 8183 > > > > Signed-off-by: Ben Ho > > Signed-off-by: Erin Lo > > --- > > arch/arm64/boot/dts/mediatek/Makefile | 1 + > > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++++ > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 178 ++++++++++++++++++++++++++++ > > 3 files changed, 210 insertions(+) > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi > > > > [...] > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > new file mode 100644 > > index 0000000..8564a26 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > [...] > > > + gic: interrupt-controller@0c000000 { > > + compatible = "arm,gic-v3"; > > + #interrupt-cells = <3>; > > + interrupt-parent = <&gic>; > > + interrupt-controller; > > + reg = <0 0x0c000000 0 0x40000>, // CID > > + <0 0x0c100000 0 0x200000>; // CIR > > You're missing the GICV and GICH regions that are present on both A53 > and A73 at an offset from PERIPHBASE. > > > + interrupts = ; > > + }; > > Thanks, > > M. I will fill out the GICV and GICH in next round. Thanks. Regards, Erin