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[209.132.180.67]) by mx.google.com with ESMTP id d6-v6si8876289pgc.140.2018.05.15.02.14.17; Tue, 15 May 2018 02:14:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Ntd3wyd2; dkim=pass header.i=@codeaurora.org header.s=default header.b=IORLDltf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752636AbeEOJNt (ORCPT + 99 others); Tue, 15 May 2018 05:13:49 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48546 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752129AbeEOJNq (ORCPT ); Tue, 15 May 2018 05:13:46 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7808E60790; Tue, 15 May 2018 09:13:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526375625; bh=voZHcFT6OcTi3M+v9sohtq4TIjR2qPFi46YQGDQ71TQ=; h=From:To:Cc:Subject:Date:From; b=Ntd3wyd2U6/lnkBtgTZVofNXomoFbjO4RaS7+1VOVpLy45Z28E6K4VAsJgR0eyu1R RGFf04kJ+ASlFbeI3LuTdBYQVosP57biLFbaSlT/a694MCIQZJ9BB7DgihgoggftOW AipFxm2AlQIJ/U5AC02ANa+FQjfc/JQ18/rrIDTU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0158D6055C; Tue, 15 May 2018 09:13:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526375624; bh=voZHcFT6OcTi3M+v9sohtq4TIjR2qPFi46YQGDQ71TQ=; h=From:To:Cc:Subject:Date:From; b=IORLDltf5VgRhG8tHU+AbIYKLlyO1y4upDIOTz/1A0pbG1KKrObe8m4yo8zWi7Cpc o+fz6BVubV3y903/ZSvIAsywcXVu8nDI3EP32jMdt5A8r8DvC0A0RSd/8owdj3ZcFC OC+QDE2e+tMyrHAPYJefya/x1fZKrWK45IxIGlWI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0158D6055C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, viresh.kumar@linaro.org, nm@ti.com, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v7 00/14] CPU scaling support for msm8996 Date: Tue, 15 May 2018 12:13:22 +0300 Message-Id: <1526375616-16904-1-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [v7] * Addressed comments from Viresh about resourses deallocation and DT compatible [v6] * Addressed comments from Viresh about: ** Comments style ** Kconfig bool instead of tristate ** DT and documentation style ** Resourses deallocation on an error ** Typos [v5] * Rebased * Addressed comments from Bjorn about SPDX style, functions and parameters naming * Addressed comments from Viresh DT properties and style, comments style, resourses deallocation, documentation placement * Addressed comments from Sricharan about unnessesary include * Addressed comments from Nicolas * Addressed comments from Rob about the commit messages and acks * Addressed comments from Mark [v4] * Adressed all comments from Stephen * Added CPU regulator support * Added qcom-cpufreq-kryo driver [v3] * Rebased on top of the latest PLL driver changes * Addressed comment from Rob Herring for bindings [v2] * Addressed comments from Rob Herring for bindings * Addressed comments from Mark Rutland for memory barrier * Addressed comments from Julien Thierry for clock reenabling condition * Tuned the HW configuration for clock frequencies below 600MHz Clocks: This series adds support for the CPU clocks on msm8996 devices. The driver uses the existing PLL drivers and is required to control the CPU frequency scaling on the MSM8996. Regulators: Added SAW regulator support to the SPMI regulator driver. The SAW regulators will be controlled through special CPU registers instead of direct SPMI accesses. Cpufreq: The qcom-cpufreq-kryo driver is aimed to support different SOC versions. The driver reads eFuse information and chooses the required OPP subset by passing the OPP supported-hw parameter. A previous post of RFC can be found here: https://patchwork.kernel.org/patch/10398455/ Ilia Lin (11): soc: qcom: Separate kryo l2 accessors from PMU driver clk: qcom: Add CPU clock driver for msm8996 clk: qcom: Add DT bindings for CPU clock driver for msm8996 clk: qcom: Add ACD path to CPU clock driver for msm8996 dt: qcom: Add opp and thermal to the msm8996 regulator: qcom_spmi: Add support for SAW dt-bindings: qcom_spmi: Add support for SAW documentation dt: qcom: Add SAW regulator for 8x96 CPUs cpufreq: Add Kryo CPU scaling driver dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu dt: qcom: Add qcom-cpufreq-kryo driver configuration Rajendra Nayak (3): clk: qcom: Make clk_alpha_pll_configure available to modules clk: qcom: cpu-8996: Add support to switch to alternate PLL clk: qcom: cpu-8996: Add support to switch below 600Mhz .../devicetree/bindings/clock/qcom,kryocc.txt | 17 + .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +++++++++++++++++++++ .../bindings/regulator/qcom,spmi-regulator.txt | 45 ++ arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 651 +++++++++++++++++++- drivers/clk/clk-fixed-factor.c | 2 +- drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-alpha-pll.c | 1 + drivers/clk/qcom/clk-alpha-pll.h | 6 + drivers/clk/qcom/clk-cpu-8996.c | 519 ++++++++++++++++ drivers/cpufreq/Kconfig.arm | 11 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 3 + drivers/cpufreq/qcom-cpufreq-kryo.c | 150 +++++ drivers/perf/Kconfig | 1 + drivers/perf/qcom_l2_pmu.c | 90 +-- drivers/regulator/qcom_spmi-regulator.c | 133 +++- drivers/soc/qcom/Kconfig | 3 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/kryo-l2-accessors.c | 65 ++ include/soc/qcom/kryo-l2-accessors.h | 21 + 22 files changed, 2332 insertions(+), 80 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,kryocc.txt create mode 100644 Documentation/devicetree/bindings/opp/kryo-cpufreq.txt create mode 100644 drivers/clk/qcom/clk-cpu-8996.c create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c create mode 100644 drivers/soc/qcom/kryo-l2-accessors.c create mode 100644 include/soc/qcom/kryo-l2-accessors.h -- 1.9.1