Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp332153imm; Tue, 15 May 2018 02:19:20 -0700 (PDT) X-Google-Smtp-Source: AB8JxZquiGjaGuddHYoRgI/ZFx5QTU8KiMQnGiV7MJqWfAi5kXwu2nFEU5Q0Jsd3ac+UjrcSIZpA X-Received: by 2002:a62:104a:: with SMTP id y71-v6mr14079334pfi.188.1526375959943; Tue, 15 May 2018 02:19:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526375959; cv=none; d=google.com; s=arc-20160816; b=d1wvuam7viqrbP3jpHz+59L+8o8nXb1Znt03BeuD/tAcwPG3HTaNwlsYpxGubVMl8E ZvKyNeqvJSAfdzmRNrCIF9IdFYE3+QkEgeREp0ZIP7uUK1T0oRLIPOkrrIypeDf4DVgf TBRfMoJ4KYLiF0grIIcKUuqWV0MuT/z5/0WEzYiKtUmrkdGVHzn4rz9XyZHoxZslrS7S AE5AQqEOBtPWXcNsXwK09/QQ3PSQN0wEsxWBSBmPTesQnifJgxrG2OPi3EevPIB5y9jS GfSNgW6F3op2zdJgBsceRc0kpFeaerhL0SQcjzZCbE6QbM5o08SPBh/54u04uT0C6OSW b5CQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dmarc-filter:dkim-signature:dkim-signature :arc-authentication-results; bh=VQAwn6VrK5w0KNC2tcSrBwfby39AjPFjZbSiK0vQGu0=; b=Jb0VcUuOah6MHnx1JBEMqODz0i5qqgIsViZ0zxgYQeaLfoX0qfPfTQYO/ZrkI6YOpj Ze1ccX3NQXNlkU9w+QccUiVHKOPcfJmYqAHp3m7pdhNoMhPDM2ieTwwBz2wAToOXmI+j F18ic4jNw0f6BIKGVU/2oM7wfD8hBUAw6pX4n3O52nGnMP+IM0rZFBpjvOuxlrh5loK6 8e+w0E8u4uOg2S5xMOOUN9KhRIwq0YFaOMgvcOYfPh1rvA7qNdb1Shhb0t85B7OUORBS FAtMjkLE5KTdaOPN1BNvEKsSb5dkO2UZQoHyChbZ6+T8hXAtmbq3wc6YC7TMEx42ZMAd moUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=HzoCEYyi; dkim=pass header.i=@codeaurora.org header.s=default header.b=nG/Fy1bo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h4-v6si9085956pgr.93.2018.05.15.02.19.05; Tue, 15 May 2018 02:19:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=HzoCEYyi; dkim=pass header.i=@codeaurora.org header.s=default header.b=nG/Fy1bo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752862AbeEOJOt (ORCPT + 99 others); Tue, 15 May 2018 05:14:49 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:52806 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752423AbeEOJOo (ORCPT ); Tue, 15 May 2018 05:14:44 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1EAF760A06; Tue, 15 May 2018 09:14:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526375684; bh=aMD93QXfgCcPGMxAgbMB+GacslVTPajrIypC09hNUhc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HzoCEYyifSsjrOSKXZrl9x1YDgxbpIMIKLeYT8hWwZaq1GoM4lm8ZgCT2BDIqTfex z1I1GVpk91fwaf3tygNqKzuGQk0lf7p2uKzsKXZM75h0Y9zzlnx9gMam5qSXVWwxQW kgWpE50aHxFUlJc841J162IV04LwCDNY8FpFFRik= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B163860790; Tue, 15 May 2018 09:14:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526375683; bh=aMD93QXfgCcPGMxAgbMB+GacslVTPajrIypC09hNUhc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nG/Fy1bo9opaKF79yiWOOBYHUndLpUurLyNMbQpgSS94hDy7Y2Zl2DErKxVzIOYfU hHthvRBmwxcWw2lXIJeeyyS8GZAR83CfaRmQJ3VVp4g2ZctDLFWddOS1RydOTLGO8z fORGfTK0nxvsXG+RF9jR0XV7Iqjbks5iOGThnrKo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B163860790 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, viresh.kumar@linaro.org, nm@ti.com, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v7 10/14] dt-bindings: qcom_spmi: Add support for SAW documentation Date: Tue, 15 May 2018 12:13:32 +0300 Message-Id: <1526375616-16904-11-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526375616-16904-1-git-send-email-ilialin@codeaurora.org> References: <1526375616-16904-1-git-send-email-ilialin@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for SAW controlled regulators. The regulators defined as SAW controlled in the device tree will be controlled through special CPU registers instead of direct SPMI accesses. This is required especially for CPU supply regulators to synchronize with clock scaling and for Automatic Voltage Switching. Document it. Signed-off-by: Ilia Lin Reviewed-by: Rob Herring --- .../bindings/regulator/qcom,spmi-regulator.txt | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt index 57d2c65..406f2e5 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt @@ -110,6 +110,11 @@ Qualcomm SPMI Regulators Definition: Reference to regulator supplying the input pin, as described in the data sheet. +- qcom,saw-reg: + Usage: optional + Value type: + Description: Reference to syscon node defining the SAW registers. + The regulator node houses sub-nodes for each regulator within the device. Each sub-node is identified using the node's name, with valid values listed for each @@ -201,6 +206,17 @@ see regulator.txt - with additional custom properties described below: 2 = 0.55 uA 3 = 0.75 uA +- qcom,saw-slave: + Usage: optional + Value type: + Description: SAW controlled gang slave. Will not be configured. + +- qcom,saw-leader: + Usage: optional + Value type: + Description: SAW controlled gang leader. Will be configured as + SAW regulator. + Example: regulators { @@ -221,3 +237,32 @@ Example: .... }; + +Example 2: + + saw3: syscon@9A10000 { + compatible = "syscon"; + reg = <0x9A10000 0x1000>; + }; + + ... + + spm-regulators { + compatible = "qcom,pm8994-regulators"; + qcom,saw-reg = <&saw3>; + s8 { + qcom,saw-slave; + }; + s9 { + qcom,saw-slave; + }; + s10 { + qcom,saw-slave; + }; + pm8994_s11_saw: s11 { + qcom,saw-leader; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1140000>; + }; + }; -- 1.9.1