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[209.132.180.67]) by mx.google.com with ESMTP id e9-v6si104794plt.209.2018.05.15.06.59.13; Tue, 15 May 2018 06:59:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AlkqVrua; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753580AbeEONnu (ORCPT + 99 others); Tue, 15 May 2018 09:43:50 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:27891 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752154AbeEONns (ORCPT ); Tue, 15 May 2018 09:43:48 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4FDggNi006333; Tue, 15 May 2018 08:42:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1526391762; bh=0zSDgOFqKGCZ40SE1iYPL9TCZE+WUJUP8s3lezRE41Y=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=AlkqVrua+8WDW/2LCMyECE04FXBpX0R/OWO7lX36AA2hkw0j8OclCLEhZDUkbokV2 Q17oB/49DHyM2C5fmLHnYZVWFEiLnhwuy5BrnvFDj06bqAVAmdehZMI3zv0W6TpjFU 7zvaUk2VuSOvCd60be5WsXe86J3cevGbWatZT/d8= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4FDggOR006159; Tue, 15 May 2018 08:42:42 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 15 May 2018 08:42:42 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 15 May 2018 08:42:42 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4FDgZJP003381; Tue, 15 May 2018 08:42:36 -0500 Subject: Re: [PATCH v10 03/27] clk: davinci: psc: allow for dev == NULL To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <20180509172606.29387-1-david@lechnology.com> <20180509172606.29387-4-david@lechnology.com> From: Sekhar Nori Message-ID: <2f1056b3-6d29-0651-1d7d-9c74cd50861c@ti.com> Date: Tue, 15 May 2018 19:12:35 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180509172606.29387-4-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 09 May 2018 10:55 PM, David Lechner wrote: > @@ -261,10 +263,14 @@ davinci_lpsc_clk_register(struct device *dev, const char *name, > lpsc->pd = pd; > lpsc->flags = flags; > > - ret = devm_clk_hw_register(dev, &lpsc->hw); > + ret = clk_hw_register(dev, &lpsc->hw); > if (ret < 0) > return ERR_PTR(ret); > > + /* for now, genpd is only registered when using device-tree */ > + if (!dev || !dev->of_node) > + return lpsc; > + > /* genpd attach needs a way to look up this clock */ > ret = clk_hw_register_clkdev(&lpsc->hw, name, best_dev_name(dev)); > > @@ -378,11 +384,11 @@ __davinci_psc_register_clocks(struct device *dev, > struct regmap *regmap; > int i, ret; > > - psc = devm_kzalloc(dev, sizeof(*psc), GFP_KERNEL); > + psc = kzalloc(sizeof(*psc), GFP_KERNEL); > if (!psc) > return ERR_PTR(-ENOMEM); > > - clks = devm_kmalloc_array(dev, num_clks, sizeof(*clks), GFP_KERNEL); > + clks = kmalloc_array(num_clks, sizeof(*clks), GFP_KERNEL); > if (!clks) > return ERR_PTR(-ENOMEM); > > @@ -396,14 +402,14 @@ __davinci_psc_register_clocks(struct device *dev, > for (i = 0; i < num_clks; i++) > clks[i] = ERR_PTR(-ENOENT); > > - pm_domains = devm_kcalloc(dev, num_clks, sizeof(*pm_domains), GFP_KERNEL); > + pm_domains = kcalloc(num_clks, sizeof(*pm_domains), GFP_KERNEL); > if (!pm_domains) > return ERR_PTR(-ENOMEM); > > psc->pm_data.domains = pm_domains; > psc->pm_data.num_domains = num_clks; > > - regmap = devm_regmap_init_mmio(dev, base, &davinci_psc_regmap_config); > + regmap = regmap_init_mmio(dev, base, &davinci_psc_regmap_config); > if (IS_ERR(regmap)) > return ERR_CAST(regmap); Here and in the PLL driver, you have dropped the devm_* variants (like agreed upon), but not added any error path handling. For the clocks needed for boot, its probably fine, but the same code path is used for non-essential clocks too. Just from a code completeness perspective, it will be nice to see the error path correctly handled. Apart from that both 1/27 and 3/27 look good to me. Thanks, Sekhar