Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp764696imm; Tue, 15 May 2018 08:51:41 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqg387gcCg54rAYjk+LHrbSHtV7Y+6ZYJip3inx33vG1orc/tK73Gt5GNh0umBS+OueHBOh X-Received: by 2002:a17:902:d909:: with SMTP id c9-v6mr14714365plz.293.1526399501266; Tue, 15 May 2018 08:51:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526399501; cv=none; d=google.com; s=arc-20160816; b=BKZZtSRIg6Qs2En5WXZJeKUNOO7ImIgz27EDbJwTYCXbUroscLxJfJAzjdZ1fWWXqF d4xkf/zScegrK3BYeNCN4RXvLoTZbbfFcfI4QaXzZ394pcCbCPniPm0OwSNNN8aZX6hi TGzBZnk7lI5EjHtN2UK+rAwI+dOoqOE3zEJD+sXWI11Wma0OhlLK4ZI4COP8V/JkNg0n WucylQ71sEnMmIYoaZLfzL56m9M5ukdFkL6H/T9WNH/xyNKQ/8PU+qH7gpRoujwiPUR0 CBeM2Pzp7avVh7AbEFRRCsRrQ/VJJWLm+9ZZd47J0B9arM8GwtOEAha0IKFsA6zj0DnO 9YDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=OKIDO3NlczO9BhBoRppYMc0H6WiH7a+SL5hUREmttbk=; b=O25HJes3EkyMKBJaNU5pmH+lEVMJiWZbMD51RA3kxbZLHtRstKIMUTgen22T+B10LD KqOOm9UqI/0OkLXyek1CT7iEdc+R7Sy2Aj/z7AbBtIglNSrreUNinUjPUmifQGd6ZQGx 0WHzuUbTSzwBfjdI844BTCSJYvbLV2R3l1lmix1LTzf2ShfdvpWujI8XY6VcoSv6MLr6 OkzuWGExPLvRn7NbkXa426jJpHunj43CsLZ6RuZx9k/KSA51LSgh0ZK9/1vQFobcksgx 44WRZQwF5gF/0p4x2OqRGYqnhTwC95ZoKCeWCtKyX1EnWr25av68j1BWTMQ2QiXGRUlj nUGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a81-v6si311585pfg.200.2018.05.15.08.51.16; Tue, 15 May 2018 08:51:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753530AbeEOPLB (ORCPT + 99 others); Tue, 15 May 2018 11:11:01 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:34160 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753482AbeEOPK6 (ORCPT ); Tue, 15 May 2018 11:10:58 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D497D1529; Tue, 15 May 2018 08:10:57 -0700 (PDT) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.207.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 147593F25D; Tue, 15 May 2018 08:10:55 -0700 (PDT) Date: Tue, 15 May 2018 16:10:50 +0100 From: Lorenzo Pieralisi To: Gustavo Pimentel Cc: bhelgaas@google.com, Joao.Pinto@synopsys.com, jingoohan1@gmail.com, kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 0/4] Add DesignWare EP support Message-ID: <20180515151050.GA31726@e107981-ln.cambridge.arm.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 15, 2018 at 03:41:40PM +0100, Gustavo Pimentel wrote: > Patch set was made against the Lorenzo's pci/dwc branch. > > The PCIe controller dual mode is capable of operating in RC mode as well > as EP mode by configuration option. Till now only RC mode was supported, > with this patch is add EP support to the DesignWare driver. > > Gustavo Pimentel (4): > bindings: PCI: designware: Example update > PCI: dwc: Add support for EP mode > bindings: PCI: designware: Add support for EP in DesignWare driver > misc: pci_endpoint_test: Add DesignWare EP entry > > .../devicetree/bindings/pci/designware-pcie.txt | 24 +++- > drivers/misc/pci_endpoint_test.c | 1 + > drivers/pci/dwc/Kconfig | 37 +++-- > drivers/pci/dwc/pcie-designware-ep.c | 3 + > drivers/pci/dwc/pcie-designware-plat.c | 149 +++++++++++++++++++-- > drivers/pci/endpoint/functions/pci-epf-test.c | 7 + > include/linux/pci-epc.h | 8 ++ > 7 files changed, 205 insertions(+), 24 deletions(-) Applied to pci/dwc for v4.18 with some small commit log tweaks. Thanks, Lorenzo