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[209.132.180.67]) by mx.google.com with ESMTP id j84-v6si332569pfk.203.2018.05.15.08.55.40; Tue, 15 May 2018 08:55:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=Of202Ime; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753024AbeEOPnA (ORCPT + 99 others); Tue, 15 May 2018 11:43:00 -0400 Received: from vern.gendns.com ([206.190.152.46]:36095 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752318AbeEOPm6 (ORCPT ); Tue, 15 May 2018 11:42:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=9jybG8DUypCyM2NfouSFr82oxuY41WNnYnuAZkDkE9c=; b=Of202Ime6KwNE1GTuPwO+SbJX0 5d0QGb/m8T/6qHUC9jBQSO9ahIYAfQhIqVdGBUHxdwze6EPcaWGxW8Nisg0FN4XkrWzfzq/t4NbFY w0FCkmEn3xE37gPHMbo8cV5UUU7kVQaMqO/YiAIfU80Jw+fc9odMe6OD3t9D+HGdpCSgrEzuM+OZF o9RNUA3UTJCgWFBllqCI5QCSxiRT6GKWkDW9NTuU84+0Qqh3X+sUMAsbCrkG+Zk474AgPTSJq1fxX T/3vRrTF1Vkj0vV1oP4JDq8Aj6nQIgWxvw9/A8x9BHOaPo+ogD50Wyd0AK89aL7Srr6rT925xQsrK RARHJQFA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:50348 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fIc6K-003C8i-Fo; Tue, 15 May 2018 11:42:56 -0400 Subject: Re: [PATCH v10 02/27] clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE To: Sekhar Nori , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org References: <20180509172606.29387-1-david@lechnology.com> <20180509172606.29387-3-david@lechnology.com> <9203489d-0a5a-103a-67ea-d3e89bb7ebc4@ti.com> From: David Lechner Message-ID: <88dec9b1-5f4d-a1ac-2b63-b30ae7665851@lechnology.com> Date: Tue, 15 May 2018 10:42:54 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <9203489d-0a5a-103a-67ea-d3e89bb7ebc4@ti.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/15/2018 08:31 AM, Sekhar Nori wrote: > On Wednesday 09 May 2018 10:55 PM, David Lechner wrote: >> +void of_da850_pll0_init(struct device_node *node) >> { >> - return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info, >> - &da850_pll0_obsclk_info, >> - da850_pll0_sysclk_info, 7, base, cfgchip); >> + void __iomem *base; >> + struct regmap *cfgchip; >> + >> + base = of_iomap(node, 0); >> + if (!base) { >> + pr_err("%s: ioremap failed\n", __func__); >> + return; >> + } >> + >> + cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); In your previous review, you pointed out that the error did not need to be handled here because it is handled later in davinci_pll_clk_register(). We get a warning there because cfgchip is only needed for unlocking the PLL for CPU frequency scaling and is not critical for operation of the clocks. > > It will be nice to handle the error case here. > >> + >> + of_davinci_pll_init(NULL, node, &da850_pll0_info, >> + &da850_pll0_obsclk_info, >> + da850_pll0_sysclk_info, 7, base, cfgchip); > > Apart from that, it looks good to me. > > Reviewed-by: Sekhar Nori > > Thanks, > Sekhar >