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[209.132.180.67]) by mx.google.com with ESMTP id p8-v6si279499plk.441.2018.05.15.09.24.17; Tue, 15 May 2018 09:24:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Lpoxn5vi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932106AbeEOQX0 (ORCPT + 99 others); Tue, 15 May 2018 12:23:26 -0400 Received: from mail-yb0-f196.google.com ([209.85.213.196]:36525 "EHLO mail-yb0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753984AbeEOQXY (ORCPT ); Tue, 15 May 2018 12:23:24 -0400 Received: by mail-yb0-f196.google.com with SMTP id o14-v6so258950ybq.3; Tue, 15 May 2018 09:23:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cqn4+jiz5oe6kncPUTPm6vr+8HnP5nZtg5T4HJOdQ+w=; b=Lpoxn5vivUSzylsudzr049CQLerCXJ+tZDXtUk2CP4Y5AUt8EuNZoGdZxBDbWsngiu gv3aP4QnqKuNRQRYQkijtak+/veMvq2O4MlA4eMgQVupJz3B9JYB8sS9FcUPUCZGzlPv wCZNE/XUdj7ekBseD7lJCNjkDPkgbUku8XpK0ryyACd7dfyonSIfncm4MNRmrowmsw57 mnQ1qNoOcfSUdKA5eHU9OpcIoSoKOIYu9tPOsP54fh8rykfI6Dtn4nm9QhZCFtpf+uqm S3ve2QiC0HA7LxhZt/AUgoOPi1qH7HRT2nEnjOWXYe6eE84OSy3x0wT4psdt14ufaBGF cYJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cqn4+jiz5oe6kncPUTPm6vr+8HnP5nZtg5T4HJOdQ+w=; b=TOE74nkmiklyLsUgGRzez6ebbUY1Ex3cbyYAGcA/xAyoNJYrZ2spUmhEfgoNhfYk6z raDc0C4cml+aRFhMvczuUXyWB5oVK5arV8sMRlfudm/obsO9b2AYszu/9Lw8o8sgIttO vA4vg7vlO2AlTgZAgsDIGS3OWceYnspzDs0YPO/dzZwexT5ORlvNNxY1XBL6uxdegFJm TYxvsaGPQ6GweG+KjLauNlAp9v5Waqu0OqkDCTnR/6m0QeLc2BQ7bVWBM7Scg72sjTfS 5xKBjPzXMqhi1htjueoecIJOKqfL263PVXUO2uxWREl5GHEbfZViB26ZoNpORTQrEhyZ 31kw== X-Gm-Message-State: ALKqPwe8gc4S3by6LasXLbXz10OHiiNikF+3EKDVgu38ZN2iYdgqJEDa 5OBD15YHJwfVTkg+IHxwjD/9RA== X-Received: by 2002:a25:ac8d:: with SMTP id x13-v6mr9203936ybi.161.1526401403128; Tue, 15 May 2018 09:23:23 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id x9-v6sm132594ywl.108.2018.05.15.09.23.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:23:22 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 5/8] gpio: gpio-mm: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:17 -0400 Message-Id: <524f6b5cb6a340522a563ee7e3e89313aafe1486.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 67 +++++++++---------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..72668da8bf8d 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,23 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(gpiommgpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -242,37 +219,25 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[i] &= ~iomask; + gpiommgpio->out_state[i] |= bitmask; + outb(gpiommgpio->out_state[i], gpiommgpio->base + ports[i]); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.17.0