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[209.132.180.67]) by mx.google.com with ESMTP id y1-v6si971638plt.316.2018.05.15.15.45.45; Tue, 15 May 2018 15:45:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jxGtXhI3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752318AbeEOWol (ORCPT + 99 others); Tue, 15 May 2018 18:44:41 -0400 Received: from mail-ot0-f195.google.com ([74.125.82.195]:39848 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752150AbeEOWoj (ORCPT ); Tue, 15 May 2018 18:44:39 -0400 Received: by mail-ot0-f195.google.com with SMTP id l12-v6so2166017oth.6; Tue, 15 May 2018 15:44:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=y/2sM3CJArM4+bWx2tb/USrp+wdXk/ZL+B3nf0x/aCY=; b=jxGtXhI34B84k2KcaN3//pC46tvxvxiODua3UiRNuj4c6u/3rEqr/gL7cAKRyxmMP5 v7ZPR8uYphhYX2GHu9+1cEkuDu4HCXaRA0V7bgfcIGGoLrIlUFI8uD0e2Xix5YoFF5iV +ZBdhDv371HF94bqJaLwJgS1uAXoiqwWT6bbY6ouIsre7KrNB7PJiAiouAA3TytBoQQy 4G749pXou9maqXETtRRLFsix29sigfUxKxsxAkDBCnxoCADwoHNtG/ro+gpi4QyEzdfa +JhmA6IL8DdRqQIBnf2vIVonb7CGaxOpqA9tmeywMGh+2UncMsAh7A8bIDFxO4nTACdJ kw/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=y/2sM3CJArM4+bWx2tb/USrp+wdXk/ZL+B3nf0x/aCY=; b=DnbtH90DCx5tqVrcZAhr/Pr+w9p/c2ZhZKDsxcv7S0y4lDxDZYId3WiSyPe9rktxst R/pQLzYcIpXHuS2rA17UvVEo0qaaUsfyAf5iQw6fJfowWX4ljHMN8aVkn2hVkcy/8D47 /HI+g5EzXrbMTJMKis3AM15smyRexYs7GIdvAyXP3HJUIhcaL9vdiOQpUF0yjI+/6OGB YhIMeGUiJMddcs4ZKlG3tKhtDsM5mCEsjrpsDz6tN981d8SehmgWv5W6YsoNfSNIC0Cy zk+0zFfp9TQjRtxrnZ+jm9ioQElAhQ6SItHhGtBqKFWkP5czXiS40VdIpD84kor5CID1 JLDw== X-Gm-Message-State: ALKqPweAoYrHquOqc7hJ78tsjexGakxlTU0yJXxR/ScGTNAdRyrUnamy MeshKwpyKoTpTEFIqgFnxd5XaSrm6mYlrb+utZQ= X-Received: by 2002:a9d:cc8:: with SMTP id o8-v6mr12342690otd.86.1526424278549; Tue, 15 May 2018 15:44:38 -0700 (PDT) MIME-Version: 1.0 Received: by 10.201.49.75 with HTTP; Tue, 15 May 2018 15:44:37 -0700 (PDT) In-Reply-To: References: <20180509172606.29387-1-david@lechnology.com> From: Adam Ford Date: Tue, 15 May 2018 17:44:37 -0500 Message-ID: Subject: =?UTF-8?Q?Re=3A_=5BPATCH_v10_00=2F27=5D_ARM=3A_davinci=3A_convert_to_commo?= =?UTF-8?Q?n_clock_framework=E2=80=8B?= To: Bartosz Golaszewski Cc: David Lechner , linux-clk , devicetree , arm-soc , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 15, 2018 at 4:25 AM, Bartosz Golaszewski wrote: > 2018-05-14 2:40 GMT+02:00 Adam Ford : >> On Wed, May 9, 2018 at 12:25 PM, David Lechner wrote: >>> This series converts mach-davinci to use the common clock framework. >>> >>> The series works like this, the first 3 patches fix some issues with the clock >>> drivers that have already been accepted into the mainline kernel. >>> >>> Then, starting with "ARM: davinci: pass clock as parameter to >>> davinci_timer_init()", we get the mach code ready for the switch by adding the >>> code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK >>> around the legacy clocks so that we can switch easily between the old and the >>> new. >>> >>> "ARM: davinci: switch to common clock framework" actually flips the switch >>> to start using the new clock drivers. Then the next 8 patches remove all >>> of the old clock code. >>> >>> The final four patches add device tree clock support to the one SoC that >>> supports it. >>> >>> This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy >>> board file). >>> >> >> I am not sure if I did something wrong, but I attempted to build and I >> wasn't able to boot the da850-evm.dtb your repo common-clk-v11, >> however the legacy board file boot was OK. >> >> make davinci_all_defconfig ARCH=arm >> make zImage modules da850-evm.dtb ARCH=arm CROSS_COMPILE=arm-linux- -j8 >> >> 3140416 bytes read in 1464 ms (2 MiB/s) >> 20353 bytes read in 15 ms (1.3 MiB/s) >> ## Flattened Device Tree blob at c0600000 >> Booting using the fdt blob at 0xc0600000 >> Loading Device Tree to c7e57000, end c7e5ef80 ... OK >> >> Starting kernel ... >> >> Uncompressing Linux... done, booting the kernel. >> >> (and hang) >> >> If you have some suggestions, I am try them as I get time. >> >> adam >> > > Runs fine on da850-lcdk and dm365-evm. I'll test the da850-evm > tomorrow when I'll have access to it. I set the bootargs to: bootargs=console=ttyS2,115200n8 clk_ignore_unused root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait I enabled DEBUG_LL and EARLY_PRINTK, yet when it loads, I only get: ## Flattened Device Tree blob at c0600000 Booting using the fdt blob at 0xc0600000 Loading Device Tree to c7e57000, end c7e5ef35 ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. I am doing this at my home, so I don't have a debugger for the DA850-EVM. I am using a SOM that is an AM1808, but I vaguely remember something about enabling a DSP clock somewhere, but I cannot seem to find the e-mail. I know its counter intuitive that we'd need to enable a clock that runs the DSP since it doesn't exist on the AM1808, but I would have thought the clk_ignore_unused would have worked around that issue. If someone else has a DA850-EVM or suggestions, I'm willing to try them as I have time. adam > > Bart