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[209.132.180.67]) by mx.google.com with ESMTP id d9-v6si1428196pfm.226.2018.05.15.18.07.27; Tue, 15 May 2018 18:08:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=18Zfph93; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752030AbeEPBHQ (ORCPT + 99 others); Tue, 15 May 2018 21:07:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:33172 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbeEPBHP (ORCPT ); Tue, 15 May 2018 21:07:15 -0400 Received: from mail-qk0-f173.google.com (mail-qk0-f173.google.com [209.85.220.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A9E4120834; Wed, 16 May 2018 01:07:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1526432834; bh=Y71+LUMZiEZXZQVf7vccyrLD28gw8E7E1rVz/HFwTJQ=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=18Zfph93ZKgNvlaGD5jVKQ3xX0jAwzNfTi6lgbwZNmhcKtaB0nEQ6Ko8+uA5+QdRx Y651J1Qxz6g9SFk0FPuYBJlmci+Z0L64zYtLVzrkCy9Y66ul0WRJstfLWte8xIPvz9 P3pMkHYtRzqfGB9WR+Mydx1U30mgvYHx+enmMMkw= Received: by mail-qk0-f173.google.com with SMTP id s83-v6so1826411qke.7; Tue, 15 May 2018 18:07:14 -0700 (PDT) X-Gm-Message-State: ALKqPwds8A6Kh7jkzRofXqG8l475Zsj3q9dqA48NEgqE9s3/mZoXBgiD iRrQwUkn7jpXYRIzYooJ7NqeZze4GQqV6ChBiA== X-Received: by 2002:a37:1f84:: with SMTP id n4-v6mr14580704qkh.375.1526432833402; Tue, 15 May 2018 18:07:13 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.155.2 with HTTP; Tue, 15 May 2018 18:06:52 -0700 (PDT) In-Reply-To: References: <20180511162028.20616-1-brgl@bgdev.pl> <20180511162028.20616-11-brgl@bgdev.pl> From: Rob Herring Date: Tue, 15 May 2018 20:06:52 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 10/12] platform/early: implement support for early platform drivers To: Bartosz Golaszewski Cc: Sekhar Nori , Kevin Hilman , David Lechner , Michael Turquette , Stephen Boyd , Arnd Bergmann , Greg Kroah-Hartman , Mark Rutland , Yoshinori Sato , Rich Felker , Andy Shevchenko , Marc Zyngier , "Rafael J . Wysocki" , Peter Rosin , Jiri Slaby , Thomas Gleixner , Daniel Lezcano , Geert Uytterhoeven , Magnus Damm , Johan Hovold , Frank Rowand , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" , devicetree , "open list:GENERIC INCLUDE/ASM HEADER FILES" , Bartosz Golaszewski Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 15, 2018 at 9:06 AM, Bartosz Golaszewski wrote: > 2018-05-14 15:37 GMT+02:00 Rob Herring : >> On Fri, May 11, 2018 at 11:20 AM, Bartosz Golaszewski wrote: >>> From: Bartosz Golaszewski >>> >>> This introduces the core part of support for early platform drivers >>> and devices. >>> >> >> It looks like most of your prep patches are to separate the alloc and >> init of platform devices because you are essentially making early >> devices/drivers a sub-class. Maybe you could avoid doing that and >> simplify things a bit. Comments below based on doing that... >> > > My aim was to change as little as possible for everybody else while > fixing our problem. These changes are already controversial enough > without risky reusing of existing fields in common structures. I was > just afraid that there are too many intricacies for it to be safe. I don't think those intricacies would go away just by having separate fields. Perhaps it would make things fail more explicitly. After all, I think it needs to be a very atomic operation when a device is switched. >>> +/** >>> + * struct early_platform_driver >>> + * >>> + * @pdrv: real platform driver associated with this early platform driver >>> + * @list: list head for the list of early platform drivers >>> + * @early_probe: early probe callback >>> + */ >>> +struct early_platform_driver { >>> + struct platform_driver pdrv; >>> + struct list_head list; >> >> Couldn't you use an existing list in driver_private until you move >> over to the normal bus infra. >> > > This is something that the previous implementation did. It was quite > unreadable, so I decided to go with a separate list. > >>> + int (*early_probe)(struct platform_device *); >> >> Just add this to platform_driver. >> > > This would extend the structure for everybody else while there'll be > very few such devices and not all systems would even require it. > >>> +}; >>> + >>> +/** >>> + * struct early_platform_device >>> + * >>> + * @pdev: real platform device associated with this early platform device >>> + * @list: list head for the list of early platform devices >>> + * @deferred: true if this device's early probe was deferred >>> + * @deferred_drv: early platform driver with which this device was matched >>> + */ >>> +struct early_platform_device { >>> + struct platform_device pdev; >>> + struct list_head list; >> >> Use a list in device_private? >> >>> + bool deferred; >>> + struct early_platform_driver *deferred_drv; >> >> Can't you use the existing deferred probe list? >> > > I thought about it, but I was afraid there could be some timing issues > with that and decided against it. The early deferral also doesn't work > in a workque, but is synchronous instead. I didn't mean use the wq, but just the list fields. You'd still have the early list and normal list with different list heads. If you ever had a device wanting to be on both lists at the same time, then you've got major problems. Rob