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[209.132.180.67]) by mx.google.com with ESMTP id d12-v6si1337896plo.551.2018.05.15.18.22.37; Tue, 15 May 2018 18:22:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752358AbeEPBWX (ORCPT + 99 others); Tue, 15 May 2018 21:22:23 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7671 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752038AbeEPBWV (ORCPT ); Tue, 15 May 2018 21:22:21 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 15F2ED611A0AB; Wed, 16 May 2018 09:22:07 +0800 (CST) Received: from vm107-55-164.huawei.com (100.107.55.164) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.361.1; Wed, 16 May 2018 09:22:01 +0800 From: Xiaowei Song To: , , , , , , , CC: , , , , Subject: [PATCH v4] PCI: kirin: Add MSI support Date: Wed, 16 May 2018 09:21:59 +0800 Message-ID: <20180516012159.44081-2-songxiaowei@hisilicon.com> X-Mailer: git-send-email 2.11.GIT In-Reply-To: <20180516012159.44081-1-songxiaowei@hisilicon.com> References: <20180516012159.44081-1-songxiaowei@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.55.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yao Chen Add support for MSI. Signed-off-by: Yao Chen Cc: Xiaowei Song --- drivers/pci/dwc/pcie-kirin.c | 51 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c index d2970a0..00ca4e5 100644 --- a/drivers/pci/dwc/pcie-kirin.c +++ b/drivers/pci/dwc/pcie-kirin.c @@ -426,9 +426,28 @@ static int kirin_pcie_establish_link(struct pcie_port *pp) return 0; } +static irqreturn_t kirin_pcie_msi_irq_handler(int irq, void *arg) +{ + struct pcie_port *pp = arg; + + return dw_handle_msi_irq(pp); +} + +static void kirin_pcie_msi_init(struct pcie_port *pp) +{ + dw_pcie_msi_init(pp); +} + +static void kirin_pcie_enable_interrupts(struct pcie_port *pp) +{ + if (IS_ENABLED(CONFIG_PCI_MSI)) + kirin_pcie_msi_init(pp); +} + static int kirin_pcie_host_init(struct pcie_port *pp) { kirin_pcie_establish_link(pp); + kirin_pcie_enable_interrupts(pp); return 0; } @@ -445,9 +464,41 @@ static const struct dw_pcie_host_ops kirin_pcie_host_ops = { .host_init = kirin_pcie_host_init, }; +static int kirin_pcie_add_msi(struct dw_pcie *pci, + struct platform_device *pdev) +{ + int ret = 0; + + if (IS_ENABLED(CONFIG_PCI_MSI)) { + ret = platform_get_irq(pdev, 0); + if (ret < 0) { + dev_err(&pdev->dev, "failed to get MSI IRQ (%d)\n", + pci->pp.msi_irq); + return ret; + } + + pci->pp.msi_irq = ret; + + ret = devm_request_irq(&pdev->dev, pci->pp.msi_irq, + kirin_pcie_msi_irq_handler, + IRQF_SHARED | IRQF_NO_THREAD, + "kirin_pcie_msi", &pci->pp); + if (ret) + dev_err(&pdev->dev, "failed to request MSI IRQ %d\n", + pci->pp.msi_irq); + } + return ret; +} + static int __init kirin_add_pcie_port(struct dw_pcie *pci, struct platform_device *pdev) { + int ret; + + ret = kirin_pcie_add_msi(pci, pdev); + if (ret) + return ret; + pci->pp.ops = &kirin_pcie_host_ops; return dw_pcie_host_init(&pci->pp); -- 2.7.3