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Message-ID: <a34429cf43124de623fcaa645d5d7a360c755867.camel@microchip.com>
Subject: Re: [PATCH] mtd: spi-nor: add support for Microchip 25LC256
From:   Radu Pirea <radu.pirea@microchip.com>
To:     Marek Vasut <marek.vasut@gmail.com>,
        Boris Brezillon <boris.brezillon@bootlin.com>
CC:     <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
        <Zhiqiang.Hou@nxp.com>, <pp@emlix.com>, <richard@nod.at>,
        <computersforpeace@gmail.com>, <dwmw2@infradead.org>
Date:   Wed, 16 May 2018 13:05:21 +0300
In-Reply-To: <1db092c8-95fb-5747-f7b9-f6a215b1aa5b@gmail.com>
References: <20180504155404.5285-1-radu.pirea@microchip.com>
         <20180504204013.254d90cf@bbrezillon>
         <e2e23aa21b37754b0c84003e6d87c7cb7d5a17fe.camel@microchip.com>
         <1db092c8-95fb-5747-f7b9-f6a215b1aa5b@gmail.com>
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On Wed, 2018-05-16 at 00:17 +0200, Marek Vasut wrote:
> On 05/15/2018 06:22 PM, Radu Pirea wrote:
> > On Fri, 2018-05-04 at 20:40 +0200, Boris Brezillon wrote:
> > > On Fri, 4 May 2018 18:54:04 +0300
> > > Radu Pirea <radu.pirea@microchip.com> wrote:
> > >=20
> > > > Added geometry description for Microchip 25LC256 memory.
> > >=20
> > > Same as for the dataflash stuff you posted a few weeks ago: I
> > > don't
> > > think this device belongs in the SPI NOR framework.
> >=20
> > Hi Boris,
> >=20
> > 25lc256 memory is similar with mr25h256, the only difference is the
> > page size(64 vs 256). Because mr25h256 is already in SPI NOR
> > framework
> > I added here 25lc256.
>=20
> I think I must be reading the wrong datasheet, but can you show me
> how
> does it support things like READID opcode ?
>=20
Hi Marek,

I read the datasheet for 25lc256 and for mr25h256 and none of them
supports READID. Is this required for a chip to be included in spi-nor
framework? I just followed the mr25h256 as an example.=20
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