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[209.132.180.67]) by mx.google.com with ESMTP id z19-v6si2711074plo.174.2018.05.16.08.19.46; Wed, 16 May 2018 08:20:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751217AbeEPPTc (ORCPT + 99 others); Wed, 16 May 2018 11:19:32 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:37341 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750847AbeEPPTa (ORCPT ); Wed, 16 May 2018 11:19:30 -0400 Received: by mail-wm0-f67.google.com with SMTP id l1-v6so2795887wmb.2 for ; Wed, 16 May 2018 08:19:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=HbTf6Bugq6TSP+vMl7M974dRzC78oCFalc4jj+/vD/A=; b=gVJN/f0anNrWE2Atkhh99zCGRpU6z9nU6tzROZ0oyVDpWUA5e9bbv6VsfVngGV/0Pa CnLOOu8Z7NaMnhCJ5Z49jsybfHENBeipN6iNBukUrXfPi9osx2cDstPay+bmuJT7wEaz 1FhOKw9FOynX4N8CZTqwtKSlwNff43sc2/hSYXpuYCuoiaaVF8BKLWEdeDMZd0e9FhXq oQZiHdcJy4/erb1Ng3YCZkiZXUnI9MVpGxKE0Fp95h0kvHKx9l4MrzxWK47GdFWBoQ0B 7IqvMA91iAvqjEFggwR+HSo+Rqu3qf05i/xTJlgxi4Fl+FalAUvjq75czCxxLsfQ3Ogz 2WtQ== X-Gm-Message-State: ALKqPwdp1QggdKoEKSRqROF9UZwQpYJlsqnXnt8M174jedlliKuCuxf6 oY1x8BKzoUj093LvG8AXDJCYqg== X-Received: by 2002:a1c:8895:: with SMTP id k143-v6mr1080552wmd.17.1526483969337; Wed, 16 May 2018 08:19:29 -0700 (PDT) Received: from localhost.localdomain ([151.15.207.48]) by smtp.gmail.com with ESMTPSA id c27-v6sm4863766wrg.75.2018.05.16.08.19.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 May 2018 08:19:28 -0700 (PDT) Date: Wed, 16 May 2018 17:19:25 +0200 From: Juri Lelli To: Srinivas Pandruvada Cc: tglx@linutronix.de, mingo@redhat.com, peterz@infradead.org, bp@suse.de, lenb@kernel.org, rjw@rjwysocki.net, mgorman@techsingularity.net, x86@kernel.org, linux-pm@vger.kernel.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org Subject: Re: [RFC/RFT] [PATCH 02/10] cpufreq: intel_pstate: Conditional frequency invariant accounting Message-ID: <20180516151925.GO28366@localhost.localdomain> References: <20180516044911.28797-1-srinivas.pandruvada@linux.intel.com> <20180516044911.28797-3-srinivas.pandruvada@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180516044911.28797-3-srinivas.pandruvada@linux.intel.com> User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/05/18 21:49, Srinivas Pandruvada wrote: > intel_pstate has two operating modes: active and passive. In "active" > mode, the in-built scaling governor is used and in "passive" mode, > the driver can be used with any governor like "schedutil". In "active" > mode the utilization values from schedutil is not used and there is > a requirement from high performance computing use cases, not to read > any APERF/MPERF MSRs. In this case no need to use CPU cycles for > frequency invariant accounting by reading APERF/MPERF MSRs. > With this change frequency invariant account is only enabled in > "passive" mode. > > Signed-off-by: Srinivas Pandruvada > --- > [Note: The tick will be enabled later in the series when hwp dynamic > boost is enabled] > > drivers/cpufreq/intel_pstate.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c > index 17e566af..f686bbe 100644 > --- a/drivers/cpufreq/intel_pstate.c > +++ b/drivers/cpufreq/intel_pstate.c > @@ -2040,6 +2040,8 @@ static int intel_pstate_register_driver(struct cpufreq_driver *driver) > { > int ret; > > + x86_arch_scale_freq_tick_disable(); > + > memset(&global, 0, sizeof(global)); > global.max_perf_pct = 100; > > @@ -2052,6 +2054,9 @@ static int intel_pstate_register_driver(struct cpufreq_driver *driver) > > global.min_perf_pct = min_perf_pct_min(); > > + if (driver == &intel_cpufreq) > + x86_arch_scale_freq_tick_enable(); This will unconditionally trigger the reading/calculation at each tick even though information is not actually consumed (e.g., running performance or any other governor), right? Do we want that? Anyway, FWIW I started testing this on a E5-2609 v3 and I'm not seeing hackbench regressions so far (running with schedutil governor). Best, - Juri