Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp2468049imm; Wed, 16 May 2018 13:23:10 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqEHDphvQylnKC13j4SXtUR1gWcu/clAbtl8b9Hzv0gvKNjeUxCpudscJ/myPXmkvEsdrYn X-Received: by 2002:a63:aa07:: with SMTP id e7-v6mr1832219pgf.331.1526502190068; Wed, 16 May 2018 13:23:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526502190; cv=none; d=google.com; s=arc-20160816; b=kWbeDNVz6LHtlDMPXtFM60MNHA5k/B7XOqKuq9lQ1MDJ8CipYX2eXb41EsFmEU+z9w JEILC+0FIyXVvAEw8z7RWbJ+F+uIpa/w2hd4QPWV9PkwtTPzLgpPwtyhMNTSR4YGvBG5 kLIotrdoNEzvIw5/YgJt3FwBk53sYtsoTTgsB3g8mc1PKKR/8rLz74/uqijABxe1wo3+ Wv9j/UfeBM8CrMBQjz+y9jE3moLK2eCVHAZGIigEeZGmtccxtRVwkT1dNMqCV8fjxisF Bd0CnRc4SwyMBHwlPNukfIRariO6xJn4xLRcLeMDXaAfOB4X7qWQVCtoCYu3lIUgOs6v pzYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=AvRX494CG+yLXA3Q6J9ugSGiLgtDKVRhwXwnEc+MdEM=; b=hxc0D3KAJ8zsHKymHtRZx9JDe7dZIdbPIMWSlYK3g5xJNYsYubvXLQZBmKOKpxyY80 fo8/V8mjCLFjVusmgyRdzzOLpO/l5k4+YCvZ05K1zcDn3C3uUHqt9/xNAB3MgUCMYnq0 8lAFynvFMrZYJZDtDhgnL2zaeKaEe/mDNYFn254SKphh4MEVtEfK6Nm3Qz0ggOFaL2gh gy4qd/Yl0XwmBkx41HeqNj5LA+lEblEENgU8PYkdwzZI/1FBTV2Kr/GynrENhIWgg9/M +SjJdKl0dvilDTae1MACxufWLbfEzt7FRWQD1WW6kVuzSn5QdFf3MgBxE4dGCijHioz1 N7yQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=l+TlJOk0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s6-v6si2724082pgr.369.2018.05.16.13.22.55; Wed, 16 May 2018 13:23:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=l+TlJOk0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751474AbeEPUW1 (ORCPT + 99 others); Wed, 16 May 2018 16:22:27 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:32804 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751013AbeEPUWZ (ORCPT ); Wed, 16 May 2018 16:22:25 -0400 Received: by mail-qk0-f194.google.com with SMTP id c11-v6so1802862qkm.0; Wed, 16 May 2018 13:22:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=AvRX494CG+yLXA3Q6J9ugSGiLgtDKVRhwXwnEc+MdEM=; b=l+TlJOk0AD2Qtf7y6w+RYObWDdyHSIToy1Pz0wueGWBB+zu8vidX2XrFxPlNcISE+7 DIpXT+BvpDgbBCiZC0/HHNZJ1JYeEfW5ha5jeVaqbUqDKWNcEswTh5CFsV1qC7KQWGi8 l6bTh5GpIy1wttqexBcGN5fuMlv32+ZpOUEKhJA1hgS8WWC/eymtwC2Pt1McY5HFL3Uu 1Mhq1gxvJQYAjcQuIXDuNitACaiKQgNip7r1vkBLz3CSoIko0UjUJb7M/rpcio8ak0Yq X5xySimDTCLgsB2FfmnUrrlEO5m4s9CUc+VuD53JtAk0NbCg/oKgCoZyMKc/ZSiUro9w uf0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=AvRX494CG+yLXA3Q6J9ugSGiLgtDKVRhwXwnEc+MdEM=; b=Dh9ayc/kxvv/hom7O2LyjXLNUx2ec2ROEjIX/KZkpP5aMusIBWSRrVwcxXBg6O1uj2 n/7UqwiWF8NCzlvS9tUnZaxoxoC0nhjsLIiUk7jjiWNftmR8Cyo9oRfaQSY+4g/xovxZ mvjBoYPQb9XZeY35xxJAOcYPj3xyQk+PsL2uBDWc/PVJzcwh3vJcDoBXUlh59bE8C24G H/T0TKa4RF9uy93qd7RCpBlyI7F6OY2RgEPeVKQKlqykU0TlR34GbrJbh24SY7w70Aki etowTooLv8jilZ6XxzK9od+3fGokOBO67ZHkHkw3tiAK6UWCQRPCprUGy4xgMgov7vEr r2SA== X-Gm-Message-State: ALKqPweGKtVZMnNh8v1t0nt8rzVFMmM5hmuLPYtEINXCWefIjQhS4Tjd 1NADvUDSIFk1aATL2Q12u+DGyzD1/XHkirB9wus= X-Received: by 2002:a37:83c4:: with SMTP id f187-v6mr2360256qkd.97.1526502144795; Wed, 16 May 2018 13:22:24 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.152.150 with HTTP; Wed, 16 May 2018 13:22:24 -0700 (PDT) In-Reply-To: <20180516103251.74707-4-giulio.benetti@micronovasrl.com> References: <20180516103251.74707-1-giulio.benetti@micronovasrl.com> <20180516103251.74707-4-giulio.benetti@micronovasrl.com> From: Andy Shevchenko Date: Wed, 16 May 2018 23:22:24 +0300 Message-ID: Subject: Re: [PATCH v5 4/4] rtc: ds1307: add frequency_test_enable sysfs attribute to check tick on m41txx To: Giulio Benetti Cc: Alessandro Zummo , alexandre.belloni@bootlin.com, Rob Herring , Mark Rutland , linux-rtc@vger.kernel.org, devicetree , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 16, 2018 at 1:32 PM, Giulio Benetti wrote: > On m41txx you can enable open-drain OUT pin to check if offset is ok. > Enabling OUT pin with frequency_test_enable attribute, OUT pin will tick > 512 times faster than 1s tick base. > > Enable or Disable FT bit on CONTROL register if freq_test is 1 or 0. > > Signed-off-by: Giulio Benetti > +static ssize_t frequency_test_enable_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, size_t count) > +{ > + struct ds1307 *ds1307 = dev_get_drvdata(dev); > + unsigned long freq_test = 0; > + int retval; > + > + retval = kstrtoul(buf, 10, &freq_test); > + if ((retval < 0) || (retval > 1)) { kstrtobool() then? > + dev_err(dev, "Failed to store RTC Frequency Test attribute\n"); > + return -EINVAL; ...and do not shadow actual error code. > + } > + > + regmap_update_bits(ds1307->regmap, M41TXX_REG_CONTROL, M41TXX_BIT_FT, > + freq_test ? M41TXX_BIT_FT : 0); > + > + return retval ? retval : count; Does the condition make any sense? > +} > +static ssize_t frequency_test_enable_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + int freq_test_en = 0; > + if (ctrl_reg & M41TXX_BIT_FT) > + freq_test_en = true; > + else > + freq_test_en = false; > + > + return sprintf(buf, "%d\n", freq_test_en); So, is it boolean or integer? This code makes it confusing a lot. > +} -- With Best Regards, Andy Shevchenko