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[209.132.180.67]) by mx.google.com with ESMTP id y67-v6si4757338pfi.195.2018.05.17.01.13.05; Thu, 17 May 2018 01:13:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TsJtyXil; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752240AbeEQIMi (ORCPT + 99 others); Thu, 17 May 2018 04:12:38 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:60711 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751478AbeEQIMf (ORCPT ); Thu, 17 May 2018 04:12:35 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4H8CEjC022559; Thu, 17 May 2018 03:12:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1526544734; bh=FZ8+S+/E2DZJf0geZhiuVQAgvT9hOjKekBlHNsKiZ3I=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=TsJtyXilS56E0bCAJCjO6KgWRMaGG71WXSGY5tQ1Yamx/bYRMY/nFI/1ncZXJS2zf HbRlF1ZoHSes3ZeB2ngGrvcb5u1MUyV16+rODf6KVkf/xS50VhPU1PxXL5XYOu+kn5 ke4I6NkYpMClEc8NOSQymjiNqls2nT/edUP2PmmI= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4H8CEuC019050; Thu, 17 May 2018 03:12:14 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 17 May 2018 03:12:14 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 17 May 2018 03:12:14 -0500 Received: from [172.24.190.215] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4H8CA1T020527; Thu, 17 May 2018 03:12:11 -0500 Subject: Re: [PATCH 1/3] ARM: dra762: hwmod: Add MCAN support To: Tony Lindgren CC: , , , , , , , , References: <1523181542-3770-1-git-send-email-faiz_abbas@ti.com> <1523181542-3770-2-git-send-email-faiz_abbas@ti.com> <20180501152615.GB98604@atomide.com> <20180515171459.GP98604@atomide.com> <20180515171808.GR98604@atomide.com> <20180515172324.GS98604@atomide.com> From: Faiz Abbas Message-ID: Date: Thu, 17 May 2018 13:43:48 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180515172324.GS98604@atomide.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tony, On Tuesday 15 May 2018 10:53 PM, Tony Lindgren wrote: > * Tony Lindgren [180515 17:20]: >> * Tony Lindgren [180515 17:17]: >>> * Faiz Abbas [180515 06:05]: >>>> Hi Tony, >>>> >>>> On Tuesday 01 May 2018 08:56 PM, Tony Lindgren wrote: >>>>> Hi, >>>>> >>>>> * Faiz Abbas [180408 09:59]: >>>>>> From: Lokesh Vutla >>>>>> >>>>>> Add MCAN hwmod data and register it for dra762 silicons. >>>>>> >>>>>> Signed-off-by: Lokesh Vutla >>>>>> Signed-off-by: Faiz Abbas >>>>>> --- >>>>>> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++++++++++ >>>>>> 1 file changed, 32 insertions(+) >>>>>> >>>>>> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >>>>>> index 62352d1..a2cd7f8 100644 >>>>>> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >>>>>> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >>>>>> @@ -1356,6 +1356,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = { >>>>>> }; >>>>>> >>>>>> /* >>>>>> + * 'mcan' class >>>>>> + * >>>>>> + */ >>>>>> +static struct omap_hwmod_class dra76x_mcan_hwmod_class = { >>>>>> + .name = "mcan", >>>>>> +}; >>>>> >>>>> Looks like you're missing the related struct omap_hwmod_class_sysconfig >>>>> entry for this with the rev and sysconfig registers. >>>>> >>>> >>>> Sorry, I missed this email earlier. The MCAN module doesn't have >>>> sysconfig registers. >>> >>> If there's no sysconfig register you should have no need for adding >>> anything to omap_hwmod_7xx_data.c. We now have the dts clkctrl >>> clocks, you can just add that to the dts node for the device. >> >> However.. My guess is there is somewhere a top level interconnect >> target module that uses DRA7XX_CM_WKUPAON_ADC_CLKCTRL. And that >> module may have multiple child devices. > > And I'm guessing the top level module with sysconfig related > registers is named "adc" :) > Yes. The MCAN clocks are controlled by the ADC_CLKCTRL register. Please see TRM: http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spruie9&fileType=pdf page: 1530 Thanks, Faiz