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[209.132.180.67]) by mx.google.com with ESMTP id d7-v6si3937044pgq.305.2018.05.17.07.37.46; Thu, 17 May 2018 07:38:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=A7MWmW0L; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752517AbeEQOhF (ORCPT + 99 others); Thu, 17 May 2018 10:37:05 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:41513 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752498AbeEQOhC (ORCPT ); Thu, 17 May 2018 10:37:02 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4HEZv2Z030369; Thu, 17 May 2018 09:35:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1526567757; bh=eRCkZXdmhdOKxRQKW8VNYvfyCbOPCa+fnQDe148FH9U=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=A7MWmW0LRz/R1NE9EGCibbSuWWCGq4a0b8xThS0bxzekEIJGb5Rw+Co3yP6kh5AWV ZwRcCALeABZ7Mwg6svsnlofRG6jNz7ntphYeYolFVBzN60huldyRcYZgObGvUzM9N+ EiK/l6Knns9EwW9dnwI5nRKERMFqT40y/c/SGU0I= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4HEZvD3029784; Thu, 17 May 2018 09:35:57 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 17 May 2018 09:35:57 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 17 May 2018 09:35:57 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4HEZrNi024921; Thu, 17 May 2018 09:35:53 -0500 Subject: Re: [PATCH v10 25/27] ARM: davinci: add device tree support to timer To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <20180509172606.29387-1-david@lechnology.com> <20180509172606.29387-26-david@lechnology.com> From: Sekhar Nori Message-ID: <8fa98514-7651-58cb-595e-6c7f713540b8@ti.com> Date: Thu, 17 May 2018 20:05:52 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180509172606.29387-26-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi David, On Wednesday 09 May 2018 10:56 PM, David Lechner wrote: > This adds device tree support to the davinci timer so that when clocks > are moved to device tree, the timer will still work. > > Signed-off-by: David Lechner > --- > +static int __init of_davinci_timer_init(struct device_node *np) > +{ > + struct clk *clk; > + > + clk = of_clk_get(np, 0); > + if (IS_ERR(clk)) { > + struct of_phandle_args clkspec; > + > + /* > + * Fall back to using ref_clk if the actual clock is not > + * available. There will be problems later if the real clock > + * source is disabled. > + */ > + > + pr_warn("%s: falling back to ref_clk\n", __func__); > + > + clkspec.np = of_find_node_by_name(NULL, "ref_clk"); > + if (IS_ERR(clkspec.np)) { > + pr_err("%s: No clock available for timer!\n", __func__); > + return PTR_ERR(clkspec.np); > + } > + clk = of_clk_get_from_provider(&clkspec); > + of_node_put(clkspec.np); > + } Do we need this error path now? Thanks, Sekhar