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[209.132.180.67]) by mx.google.com with ESMTP id n10-v6si5184716plk.112.2018.05.17.10.22.36; Thu, 17 May 2018 10:22:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=bBaBptdw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752475AbeEQRWC (ORCPT + 99 others); Thu, 17 May 2018 13:22:02 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:33982 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751396AbeEQRV6 (ORCPT ); Thu, 17 May 2018 13:21:58 -0400 Received: by mail-qt0-f195.google.com with SMTP id m5-v6so6789117qti.1 for ; Thu, 17 May 2018 10:21:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WmB2NYWRoBQywfy7Efl1Rk6/q3HMtKZEsWSAIPyi1bM=; b=bBaBptdwzhONjTNKhuCm7baqLPnCA6lykDhCZVVB9SAeKyoz4mJg/6v4qFmiIow+Ov om1Q/xIDFe5WJhiBX5llZZk7PYcizxEVoP4JApTF4F6ktHlkk3O+5hJNwRzG4mDFTI3X pN/bantZI/cVOWOYX7SpOtKkoMKQjp9S2Eu7o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WmB2NYWRoBQywfy7Efl1Rk6/q3HMtKZEsWSAIPyi1bM=; b=VHPTr7BxhTGvapv9Uluyv2DBLtdGooEJJYkDkzoD/gpSw1AqXbJepbKeUkdwPGZL6v HZ8iGuf34fUPFeQzafvT3e3Uw5qATbYo6fFsQvwTpfpi7MTfrYYGW1lZAqKQoJ9Kymxf nVsJyq9qmKQq/RY3MXm1sjezgq9GcnlFTRUfoCrs4VNBV3RE09FCHI3H3L19z6Tp5G1c AvAofk9NJV6BIwv90jOaSMG1iQK+zLoCZRdgj/W31jG7nMvmO7cMUaJW8JdLNQWoVDtX eZU3qCExzWJJ8CNTOtaizEWE66X3M1dO7jf2AM60I1BZiHEO5Zwz5omPJ3bqJqfqjpWz q2hQ== X-Gm-Message-State: ALKqPwc0ctV73KIiIsF0nyl1+JcFXvCtTDYEiCeI8U86t28gv2X9tHGG 6Pkd5nH55v5dBlywdHZfDtywsw== X-Received: by 2002:a0c:d972:: with SMTP id t47-v6mr5887284qvj.183.1526577718087; Thu, 17 May 2018 10:21:58 -0700 (PDT) Received: from lbrmn-lnxub44-1.ric.broadcom.com ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id 26-v6sm4459261qtm.16.2018.05.17.10.21.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 17 May 2018 10:21:57 -0700 (PDT) From: Ray Jui To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Bjorn Helgaas , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, Ray Jui Subject: [PATCH INTERNAL 3/3] PCI: iproc: Disable MSI parsing in certain PAXC blocks Date: Thu, 17 May 2018 10:21:32 -0700 Message-Id: <1526577692-21104-4-git-send-email-ray.jui@broadcom.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1526577692-21104-1-git-send-email-ray.jui@broadcom.com> References: <1526577692-21104-1-git-send-email-ray.jui@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The internal MSI parsing logic in certain revisions of PAXC root complexes does not work properly and can casue corruptions on the writes. They need to be disabled Signed-off-by: Ray Jui Reviewed-by: Scott Branden --- drivers/pci/host/pcie-iproc.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c index 3c76c5f..b906d80 100644 --- a/drivers/pci/host/pcie-iproc.c +++ b/drivers/pci/host/pcie-iproc.c @@ -1144,10 +1144,22 @@ static int iproc_pcie_paxb_v2_msi_steer(struct iproc_pcie *pcie, u64 msi_addr) return ret; } -static void iproc_pcie_paxc_v2_msi_steer(struct iproc_pcie *pcie, u64 msi_addr) +static void iproc_pcie_paxc_v2_msi_steer(struct iproc_pcie *pcie, u64 msi_addr, + bool enable) { u32 val; + if (!enable) { + /* + * Disable PAXC MSI steering. All write transfers will be + * treated as non-MSI transfers + */ + val = iproc_pcie_read_reg(pcie, IPROC_PCIE_MSI_EN_CFG); + val &= ~MSI_ENABLE_CFG; + iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_EN_CFG, val); + return; + } + /* * Program bits [43:13] of address of GITS_TRANSLATER register into * bits [30:0] of the MSI base address register. In fact, in all iProc @@ -1201,7 +1213,7 @@ static int iproc_pcie_msi_steer(struct iproc_pcie *pcie, return ret; break; case IPROC_PCIE_PAXC_V2: - iproc_pcie_paxc_v2_msi_steer(pcie, msi_addr); + iproc_pcie_paxc_v2_msi_steer(pcie, msi_addr, true); break; default: return -EINVAL; @@ -1427,6 +1439,24 @@ int iproc_pcie_remove(struct iproc_pcie *pcie) } EXPORT_SYMBOL(iproc_pcie_remove); +/* + * The MSI parsing logic in certain revisions of Broadcom PAXC based root + * complex does not work and needs to be disabled + */ +static void quirk_paxc_disable_msi_parsing(struct pci_dev *pdev) +{ + struct iproc_pcie *pcie = iproc_data(pdev->bus); + + if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) + iproc_pcie_paxc_v2_msi_steer(pcie, 0, false); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, + quirk_paxc_disable_msi_parsing); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0xd802, + quirk_paxc_disable_msi_parsing); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0xd804, + quirk_paxc_disable_msi_parsing); + MODULE_AUTHOR("Ray Jui "); MODULE_DESCRIPTION("Broadcom iPROC PCIe common driver"); MODULE_LICENSE("GPL v2"); -- 2.1.4