Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp3608375imm; Thu, 17 May 2018 11:28:08 -0700 (PDT) X-Google-Smtp-Source: AB8JxZokzHbF1fgNHaoIEivQ9owrxDNr0xLjlkwhP/8KM5NMY3bhrkUflQGgN6IvfTUbuLelh8me X-Received: by 2002:a62:d286:: with SMTP id c128-v6mr6202262pfg.240.1526581688780; Thu, 17 May 2018 11:28:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526581688; cv=none; d=google.com; s=arc-20160816; b=nZxqw+SUGn5+ZSm/LPRVR56w37flnWbg5KTy2FIjeW89SHGAhImEm0IoMuW4JzocAl RvAJDw3UNYYwivapcjEtRo3SLIr2gLvU/dwV/bCpu7Cv+tfmQTdsaQGWfpHEcwcm0vX4 RHHdgM+EX0kpkqb5FVOizHbxevQiKPEfxULFQLK1TFWqZ9AZKozeKbrRcVCQ/9F2GHqc U3AXGPMs6PyfqVc0Cwo2BaP0NaJXICcAF9V7RIwmHD2myxta1qMG6D1ouLJXY2QFqW4e x2YFWCID8cbjLskcwb2UCbBrVuFbdUjrBHNAtiXh9H08U0Wg9Z8P5RqoLLRIgBaLeQtV VaBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :message-id:in-reply-to:subject:cc:to:date:from:dkim-signature :arc-authentication-results; bh=WLTc0e12f9NEdPxEIpJ1gcFUqq025WEf41J8bZQTAlU=; b=Lxcf/Wj9eF7reaMkqPdzUVeb2tnybX4ZldJ9gGLeiaFgaE67cFgiyTICf/NSFjgWmZ NjoAhOBfgKIn3gBiY1WXeiTFB4rcVrnZ+QQa/sXIkqmm1n2K/5nBa8KCpwrCPOHMAjVJ nRVrUC04uVrLABt/nfBoNLGPH+vFyh2nbZSK+1XiCjQvgzkuJnhlmnNRmHyrQ2cyhUCI 5NffYbRjG5YgAzrQW5IGXZDdRk+5cz4y9j7YKXJX79aVShgTsSBpYoXFayUZua/oKIwj mLXxrqGyEVsagogzsDp77RHD3ors8yDLleumyR4jFBDwMv1B+AS5Rh7qsDiMwVB8DhyC mQ+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@maine.edu header.s=google header.b=GOtc03mS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33-v6si5666593plu.385.2018.05.17.11.27.54; Thu, 17 May 2018 11:28:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@maine.edu header.s=google header.b=GOtc03mS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752044AbeEQS1c (ORCPT + 99 others); Thu, 17 May 2018 14:27:32 -0400 Received: from mail-qk0-f195.google.com ([209.85.220.195]:45551 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751965AbeEQS1b (ORCPT ); Thu, 17 May 2018 14:27:31 -0400 Received: by mail-qk0-f195.google.com with SMTP id a8-v6so4404660qkj.12 for ; Thu, 17 May 2018 11:27:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=maine.edu; s=google; h=from:date:to:cc:subject:in-reply-to:message-id:references :user-agent:mime-version; bh=WLTc0e12f9NEdPxEIpJ1gcFUqq025WEf41J8bZQTAlU=; b=GOtc03mSITlNLd1NLHi1LgBBRj7tCmZjcHREsilRILpl6apWJgEJ5WKzctS9ocXPu8 AJjP+MnZZzgQI6cY/sHsWAXF7dlHC2Xh0mIKyFeqrpkrngxCHm4VhpwEGdTU2q67qJZZ y6Bdi+/tdPaDpXpfmCN116OS5xvHx86fl+YqY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:date:to:cc:subject:in-reply-to:message-id :references:user-agent:mime-version; bh=WLTc0e12f9NEdPxEIpJ1gcFUqq025WEf41J8bZQTAlU=; b=J/Ith3VA2kfYtjY3S8CXVgQypo7t5A/IDE6pX6z5wIMJCdbcw99/dYr3DNzfZVc+IF 9PpTjxjsb+kGkkxFjgeHiVrIGs735uBRxC4PrcR0v1jFbuee0veJyryKHf8CZJOmgxG4 nkofi+/ursjSwMI5s/mWw7OqlRRzbLMpE3jyGasNecC1xuy5sfDasWrrtfZCzox38a7K NYVo7/kJ3BheTIo0NWKKrfnrOwT2w3PyHk+VxZ4zEtbsqs/cm0svumQo6+j/7RXqdup1 +wmqGR9NUL/6xzqUtVejwlb9LJglSr9npP5KWQD/X6HKcaKzIwirVXCZgnFzeLuO81XH tUqg== X-Gm-Message-State: ALKqPwefRvI8FJpWuMgxxzBeCNytU0H7FCAzhcXqZbKCnsW+ISl6z4ar l3k+ORhKlsZ0N/mjEP4/BDTmIg== X-Received: by 2002:a37:5184:: with SMTP id f126-v6mr5829142qkb.265.1526581650279; Thu, 17 May 2018 11:27:30 -0700 (PDT) Received: from macbook-air (weaver.eece.maine.edu. [130.111.218.23]) by smtp.gmail.com with ESMTPSA id o84-v6sm4464644qkh.15.2018.05.17.11.27.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 May 2018 11:27:29 -0700 (PDT) From: Vince Weaver X-Google-Original-From: Vince Weaver Date: Thu, 17 May 2018 14:27:27 -0400 (EDT) X-X-Sender: vince@macbook-air To: Peter Zijlstra cc: Stefan Wahren , Ingo Molnar , Arnaldo Carvalho de Melo , Florian Fainelli , linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Vince Weaver , linux-kernel@vger.kernel.org, Eric Anholt , linux-arm-kernel@lists.infradead.org, Mark Rutland Subject: Re: [PATCH] arm: bcm2835: Add the PMU to the devicetree. In-Reply-To: <20180517180758.GK12198@hirez.programming.kicks-ass.net> Message-ID: References: <20180517131727.29263-1-eric@anholt.net> <1412187220.62585.1526572780332@email.1und1.de> <307323036.63872.1526576126537@email.1und1.de> <20180517180758.GK12198@hirez.programming.kicks-ass.net> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 17 May 2018, Peter Zijlstra wrote: > On Thu, May 17, 2018 at 06:55:26PM +0200, Stefan Wahren wrote: > > > Vince Weaver hat am 17. Mai 2018 um 18:34 geschrieben: > > > On Thu, 17 May 2018, Stefan Wahren wrote: > > > > > Eric Anholt hat am 17. Mai 2018 um 15:17 geschrieben: > > > > > > The a53 and a7 counters seem to match up, so we advertise a7 so that > > > > > arm32 can probe. > > > > > > so how closely did you look at the a53/a7 differences? I see some major > > > differences, especially with the CPU_CYCLES event (0xff vs 0x11). > > > > > > The proper fix here might be to add a cortex-a53 PMU entry to the armv7 > > > code rather than trying to treat it as a cortex-a7. > > > > we like to use the PMU of BCM2837 SoC (4x A53 cores) under arm32 and arm64. > > > > What is the right way (tm) to the define the DT compatibles? > > Does the arm32 PMU driver need patching for proper A53 support? > > I'm completely clueless on all of this; Mark might have ideas. Spending more time looking at it the only obvious differences are the previously mentioned CYCLES difference, as well as the cortex-a7 has 18 events in the perf_cache_map but cortex-a53 only has 3. Plus probably support for the various other features of the armv8v3 pmu that the a7 knows nothing about. Is it hard to get lines in the DT changed once they are there? If we go with cortex-a7 now, would it be possible to later drop that if proper cortex-a53 support is added to the armv7 pmu driver? Or would that lead to all kinds of back-compatability mess? Vince