Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp3826156imm; Thu, 17 May 2018 15:45:47 -0700 (PDT) X-Google-Smtp-Source: AB8JxZorDw7fHS8LG6fMxlzeiziw5zvElGME6cum0a+WsK2dQf8/2hNsrWZX99rweBEB96tGA75Z X-Received: by 2002:a62:c6d9:: with SMTP id x86-v6mr6831824pfk.192.1526597147310; Thu, 17 May 2018 15:45:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526597147; cv=none; d=google.com; s=arc-20160816; b=vq4187+aEfRIpiHHOAj+hZuQOK//Fj95PUdU59nv3JhMzhCB5/pB3zS0LQQi2PdEo5 IWStjiwNuyLwfLF06Muu6S02YHHRLf0u9vt8T/RCjaeE15Kbu5hPPXEHQmyoRRC9g6Kl /vzR9k6Ay21xUvMrIHRIEbQ0tmSQhcEm0Xmy7zz89KUqlgrJCF5lB3JqrsT3LQo/HT+s oHBAfdrYALVfYUrWc6fzRhAGZJRo6hT9/EThyodzTEweBS2jNR8Fmt8MG7P07DmBkI1B LdgFzWr3l6xJemhHAwdhcYLg7vxP1rbBYTsqmAHoEty7nzWCNqAjpgUFoXuCqTDq1meo WWFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:from:cc:to:subject :content-transfer-encoding:mime-version:references:in-reply-to :user-agent:date:arc-authentication-results; bh=XUx3VICa2pAIFQR17gKiaRe+sB/SYEwwQHYTwCxSeM8=; b=tH7rgtP7UX9PC6kP6EgfwujqhI9iwHIoQMV3mTbAmbq6X1EaqmivIrQh2MeFPmXR2R iRCc/NiDMHDI7hPjkbpmbFvtQGElYLl0tSlrbm2Sc5YduSxUTxcVq+JPWdLber+CD4C1 RAjPHUv7iakPvYkb46Aea8iW/oOB6LL4mPwUp3wNFysWdbwnYmcXTsgNQ9BN7ZaxwN0n RRwYxn1RmEBNUL2ffmmXf4TnsOSQlFsrJm0h01T3xAuWvKfSAGiz19i3Qva5yE6Plk6o 5SHE/kwdTrBKNG8ebYUhshbg3GNLlYnlO56C9V2P9LIRxeMw9cTlST6lUhekiTUZo9DY t3/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s83-v6si6121396pfg.175.2018.05.17.15.45.32; Thu, 17 May 2018 15:45:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751977AbeEQWpX convert rfc822-to-8bit (ORCPT + 99 others); Thu, 17 May 2018 18:45:23 -0400 Received: from terminus.zytor.com ([198.137.202.136]:43797 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750938AbeEQWpW (ORCPT ); Thu, 17 May 2018 18:45:22 -0400 Received: from [IPv6:2607:fb90:86a9:40e7:f0b4:4435:4a20:a609] ([172.58.75.94]) (authenticated bits=0) by mail.zytor.com (8.15.2/8.15.2) with ESMTPSA id w4HMjC6H2196028 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Thu, 17 May 2018 15:45:14 -0700 Date: Thu, 17 May 2018 15:45:05 -0700 User-Agent: K-9 Mail for Android In-Reply-To: <20180517213001.GA4047@avx2> References: <20180517213001.GA4047@avx2> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [PATCH 1/3] x86: verify_cpu: use 32-bit arithmetic To: Alexey Dobriyan , tglx@linutronix.de, mingo@redhat.com CC: x86@kernel, linux-kernel@vger.kernel.org From: hpa@zytor.com Message-ID: <8143B7B9-65E5-4467-BD14-B8CF2DD9AD62@zytor.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On May 17, 2018 2:30:01 PM PDT, Alexey Dobriyan wrote: >32-bit instructions are 1 byte shorter than 16-bit instructions. > >Signed-off-by: Alexey Dobriyan >--- > > arch/x86/kernel/verify_cpu.S | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > >--- a/arch/x86/kernel/verify_cpu.S >+++ b/arch/x86/kernel/verify_cpu.S >@@ -56,14 +56,14 @@ ENTRY(verify_cpu) > cmpl $0x1,%eax > jb .Lverify_cpu_no_longmode # no cpuid 1 > >- xor %di,%di >+ xor %edi, %edi > cmpl $0x68747541,%ebx # AuthenticAMD > jnz .Lverify_cpu_noamd > cmpl $0x69746e65,%edx > jnz .Lverify_cpu_noamd > cmpl $0x444d4163,%ecx > jnz .Lverify_cpu_noamd >- mov $1,%di # cpu is from AMD >+ mov $1, %edi # cpu is from AMD > jmp .Lverify_cpu_check > > .Lverify_cpu_noamd: >@@ -122,13 +122,13 @@ ENTRY(verify_cpu) > andl $SSE_MASK,%edx > cmpl $SSE_MASK,%edx > je .Lverify_cpu_sse_ok >- test %di,%di >+ test %edi, %edi > jz .Lverify_cpu_no_longmode # only try to force SSE on AMD > movl $MSR_K7_HWCR,%ecx > rdmsr > btr $15,%eax # enable SSE > wrmsr >- xor %di,%di # don't loop >+ xor %edi, %edi # don't loop > jmp .Lverify_cpu_sse_test # try again > > .Lverify_cpu_no_longmode: Well, in 32/64-bit mode... this code is also assembled in 16-bit mode, and the 16-but code is more space sensitive. -- Sent from my Android device with K-9 Mail. Please excuse my brevity.