Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp4193886imm; Fri, 18 May 2018 00:33:06 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo8M1dzqGWj9D3gDMybf7AlnI5ySU1MuuQnvvkclDOsXvKoxCUCgiso5DpMUZUTyLG/WpjG X-Received: by 2002:a63:7d43:: with SMTP id m3-v6mr6681687pgn.117.1526628786019; Fri, 18 May 2018 00:33:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526628785; cv=none; d=google.com; s=arc-20160816; b=pJ7IfkB4se4vP33G+lNwPczSblxnZFkIyU46t1RCy5KEJpbW7iMFyo+K7zVSDHsZzp JDBODL1IxxKj6CbiUN5YSDHsKJI5JEDjfK/34K0+eOmZd/KqZLTCaMeYzTz5lHNAaFXg Ks44ApBnAT9cwcci7aFPnfPLu7GSzVV3ugKl7sS2juzBwd9/ezM+dP43xTAJXW1H7fjt EK5QO/ng/DHm9xFrECaT5mFAypXCcC+wd5ueHuLK7xS+uWBeeGki0FFWBt0NvqjLWeAD HAjTesDXYM6WzUQSqzuZEiuy+YsF+XwfbQRjM/4BegTTpTKoPtWCU3r/7Vvi948OCf0B jmGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-disposition :content-transfer-encoding:mime-version:in-reply-to:references :subject:cc:to:from:date:message-id:arc-authentication-results; bh=WhYzXgNWAfGw0bGSQlGYdfm+fEKQr0He/cgf+4kSFCs=; b=PehR+VCxMFvar1czkhjv22ND7qVByJk5sbb8ntMoSdKgeM9oizMakaChRwpeSarBRn /vTBB7zh1FZ2ZyraxzByqYftEf6KckWv48i+FH0qf6f6n1siMqpT5K1dsRGuuwpp1vOP epYfs/bXXjvxMIE0/JsPPJGzfVfbp+02WcE6cLlDU1yQ61Tr4zJWWh1SieRJY7ZAspjW eykfbuBumcjhWQZfW0yAO2I4/c0AaAQZKxQNhImyemH6D6z2sG5QMhy5UTnfrp+S6HXc /nv1x+If2cklkCXQp68DagJoMQbiW1a1G1HskekvXJWfRIFeuRasP1YUddlQnYHO23Iq L40w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p7-v6si5477794pga.473.2018.05.18.00.32.51; Fri, 18 May 2018 00:33:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752234AbeERHbe convert rfc822-to-8bit (ORCPT + 99 others); Fri, 18 May 2018 03:31:34 -0400 Received: from prv1-mh.provo.novell.com ([137.65.248.33]:33652 "EHLO prv1-mh.provo.novell.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751644AbeERHbd (ORCPT ); Fri, 18 May 2018 03:31:33 -0400 Received: from INET-PRV1-MTA by prv1-mh.provo.novell.com with Novell_GroupWise; Fri, 18 May 2018 01:31:32 -0600 Message-Id: <5AFE815402000078001C3E50@prv1-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 18.0.0 Date: Fri, 18 May 2018 01:31:32 -0600 From: "Jan Beulich" To: "Boris Ostrovsky" Cc: "xen-devel" , "Juergen Gross" , Subject: Re: [PATCH v3 1/2] xen/PVH: Set up GS segment for stack canary References: <20180517144723.21585-1-boris.ostrovsky@oracle.com> <20180517144723.21585-2-boris.ostrovsky@oracle.com> <5AFD999402000078001C3B29@prv1-mh.provo.novell.com> <656c5250-3406-a98a-309c-ac3d7e3e4c41@oracle.com> In-Reply-To: <656c5250-3406-a98a-309c-ac3d7e3e4c41@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> On 17.05.18 at 19:47, wrote: > On 05/17/2018 11:02 AM, Jan Beulich wrote: >>>>> On 17.05.18 at 16:47, wrote: >>> @@ -64,6 +67,9 @@ ENTRY(pvh_start_xen) >>> mov %eax,%es >>> mov %eax,%ss >>> >>> + mov $PVH_CANARY_SEL,%eax >>> + mov %eax,%gs >> I doubt this is needed for 64-bit (you could equally well load zero or leave >> in place what's there in that case), > > I don't understand this. The actual selector value doesn't matter on 64-bit. Hence you could omit the load altogether, or you could use plain zero. No need for the (non-zero) selector, or (by implication) the GDT descriptor. >> and loading the selector before setting >> the base address in the descriptor won't have the intended effect. > > > I wasn't sure about this either but then I noticed that > secondary_startup_64() does it in the same order (although not using the > MSR). Well, for one they load a null selector, which is independent of setting up any GDT descriptors. I also don't understand why you say "although not using the MSR" when they clearly do. And then, as said above (and also in a comment in secondary_startup_64()), the actual selector value (and when / if at all it is loaded) doesn't matter on 64-bit. The ordering does matter on 32-bit though. Jan