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[209.132.180.67]) by mx.google.com with ESMTP id d8-v6si5838944pgt.630.2018.05.18.02.50.21; Fri, 18 May 2018 02:50:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=UOwPokJa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753152AbeERJso (ORCPT + 99 others); Fri, 18 May 2018 05:48:44 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:34703 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752601AbeERJsj (ORCPT ); Fri, 18 May 2018 05:48:39 -0400 Received: by mail-pl0-f68.google.com with SMTP id ay10-v6so4298448plb.1 for ; Fri, 18 May 2018 02:48:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3sth2UgzDMVoEBUXvK4hC4EFLplQggxpjyONElRf5cE=; b=UOwPokJa0BOxT/s94IuQwxCyAj/Ehf+LVyHBKH6tgBiKUBYRUnnoKRUVC50m7T3h0E /JslVWPZoKpx+ZQvmKVZOAjOefG/rmIRcbQ+yvuot9kA7trNTqk6FmeZU3NwChpmyrlA Ut0dG+blPDTGUTw7Aw8SMersWNYcG/2II9Qwg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3sth2UgzDMVoEBUXvK4hC4EFLplQggxpjyONElRf5cE=; b=JHIpY3ODQWUwyoFYjz1Ath/qtBGpij56Zi8lwZdGTlDIs0jcwqimP8NgPSHmB7c9pB 7JzdXsJg7M+f7+AtGUw+KKagPalo4fq8nvQ9p0Bp6NYTLtFTJ3gMcByKZeuBjdcap1SM dKf20AArlKs1AJoc85RLQWD743EGRXbzrVZVul76NM7FY5TwrU6Eizeu6uwBV6WfW1UB Up14v3phAZFtYwjHXx8X4hfyVPzV0nIiwGYKXmgIP7zbed5/eRKPQaaO75zFzVJnoFTv sQCKGaLqncenKak8W+wD+fLolsyX6txiKOW7TMActXwYfAtqg9/6MlpVcLVpThk0eDff 1skg== X-Gm-Message-State: ALKqPwfsdwkHJ5ZlMLNLV+qWjudiveBiFQemQ8qU05Stx5gPaw4T3Svg AJM0HCAviJ8HI+qMFrRvYVbrOA== X-Received: by 2002:a17:902:5c6:: with SMTP id f64-v6mr8783400plf.50.1526636918311; Fri, 18 May 2018 02:48:38 -0700 (PDT) Received: from localhost.localdomain ([183.82.227.74]) by smtp.gmail.com with ESMTPSA id j11-v6sm12694097pff.64.2018.05.18.02.48.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 18 May 2018 02:48:37 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel@lists.freedesktop.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Jagan Teki Subject: [PATCH v2 24/26] arm64: dts: allwinner: a64: a64-olinuxino: Enable HDMI output Date: Fri, 18 May 2018 15:15:34 +0530 Message-Id: <20180518094536.17201-25-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180518094536.17201-1-jagan@amarulasolutions.com> References: <20180518094536.17201-1-jagan@amarulasolutions.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable HDMI output on a64-olinuxino board. Signed-off-by: Jagan Teki --- Changes for v2: - none .../boot/dts/allwinner/sun50i-a64-olinuxino.dts | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts index 3b3081b10ecb..83329c8fec4f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts @@ -58,12 +58,38 @@ stdout-path = "serial0:115200n8"; }; + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ }; }; +&de { + status = "okay"; +}; + +&hdmi { + hvcc-supply = <®_dldo1>; + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; -- 2.14.3