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[209.132.180.67]) by mx.google.com with ESMTP id y23-v6si7127260pff.177.2018.05.18.02.52.42; Fri, 18 May 2018 02:52:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=oYhfUfrR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752822AbeERJrq (ORCPT + 99 others); Fri, 18 May 2018 05:47:46 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:43847 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752208AbeERJrn (ORCPT ); Fri, 18 May 2018 05:47:43 -0400 Received: by mail-pl0-f67.google.com with SMTP id c41-v6so4278691plj.10 for ; Fri, 18 May 2018 02:47:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4C6mL2AMmEC1ygvwQH6V+A0kmxh4Prnuw/ulDHsXp8s=; b=oYhfUfrRHMeOd08T2/PJAojGlJW6SZy2ZqJmHLcxpqtzK8JO2/kznBSodSacu0gO5b a2AjrU1zwQn5wY0L2STMIGjP9k7y3y++MCOOglxdTzc/lxdL96dBTU8mG323mjPFCBFR 2YOtthMKIN/wATlfR5myyjxvXz7sZMc9YEV7U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4C6mL2AMmEC1ygvwQH6V+A0kmxh4Prnuw/ulDHsXp8s=; b=HkbdAaYF1V9rjEl0JeWYr3VEPYR4gNQN40pMha6zwquddMWn05K841y/BVETEa6ahm fEUPoYzDCM5J0uuqI/T1JGzXAgVTGJHkzNogyjNJL/9sWoSoUKHHbL7gfuJbZoqlF62l YSDwYxvfgM0G5Dun6GpFLcmvrHA6gl10gLkpzCkMqNRpppT1hVetvtdD5LNGuOie/Ojh +ccAYNWDjbe5Y84AR+scwRkxdROFePsC/FneDppADBLGAyUbW5HUS46JJHLXzuSnBItd 17t/RCv9mz3umj8LIulThtoUv9Ugzdw2Zix+ZKrFQ9sd1VO44xOGivuYeiUYBnoTUyzS kikw== X-Gm-Message-State: ALKqPwdCzbkhxNjjUAbQDdxspwE+fo4iB5NkzSNNsoAJoYtinhDXqsU9 7CBvDXrjPb0Y9eY9Dl2o8/bOeQ== X-Received: by 2002:a17:902:5c6:: with SMTP id f64-v6mr8780808plf.50.1526636862754; Fri, 18 May 2018 02:47:42 -0700 (PDT) Received: from localhost.localdomain ([183.82.227.74]) by smtp.gmail.com with ESMTPSA id j11-v6sm12694097pff.64.2018.05.18.02.47.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 18 May 2018 02:47:42 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel@lists.freedesktop.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Jagan Teki Subject: [PATCH v2 15/26] dt-bindings: display: Add compatible for A64 HDMI PHY Date: Fri, 18 May 2018 15:15:25 +0530 Message-Id: <20180518094536.17201-16-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180518094536.17201-1-jagan@amarulasolutions.com> References: <20180518094536.17201-1-jagan@amarulasolutions.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HDMI PHY on Allwinner A64 has similar like H3/H5 but with two clock parents, so add separate compatible for A64. Signed-off-by: Jagan Teki --- Changes for v2: - Add separate compatible for A64 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 1a5ff416dea4..4f7b9dca8ca0 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -104,6 +104,7 @@ Required properties: - compatible: value must be one of: * allwinner,sun8i-a83t-hdmi-phy * allwinner,sun8i-h3-hdmi-phy + * allwinner,sun50i-a64-hdmi-phy - reg: base address and size of memory-mapped region - clocks: phandles to the clocks feeding the HDMI PHY * bus: the HDMI PHY interface clock -- 2.14.3