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[209.132.180.67]) by mx.google.com with ESMTP id s22-v6si7757216plp.216.2018.05.18.06.34.47; Fri, 18 May 2018 06:35:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752483AbeERNeA (ORCPT + 99 others); Fri, 18 May 2018 09:34:00 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53126 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752441AbeERNd6 (ORCPT ); Fri, 18 May 2018 09:33:58 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E5F9C1435; Fri, 18 May 2018 06:33:57 -0700 (PDT) Received: from e110439-lin (e110439-lin.cambridge.arm.com [10.1.210.68]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8D7363F24A; Fri, 18 May 2018 06:33:55 -0700 (PDT) Date: Fri, 18 May 2018 14:33:53 +0100 From: Patrick Bellasi To: Peter Zijlstra Cc: "Rafael J. Wysocki" , Srinivas Pandruvada , Juri Lelli , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Len Brown , "Rafael J. Wysocki" , Mel Gorman , the arch/x86 maintainers , Linux PM , Viresh Kumar , Linux Kernel Mailing List Subject: Re: [RFC/RFT] [PATCH 02/10] cpufreq: intel_pstate: Conditional frequency invariant accounting Message-ID: <20180518133353.GO30654@e110439-lin> References: <20180516163105.GP28366@localhost.localdomain> <20180517105907.GC22493@localhost.localdomain> <20180517150418.GF22493@localhost.localdomain> <1526571692.11765.10.camel@linux.intel.com> <20180517161649.GX12217@hirez.programming.kicks-ass.net> <1526575358.11765.14.camel@linux.intel.com> <20180517182803.GY12217@hirez.programming.kicks-ass.net> <20180518105742.GN30654@e110439-lin> <20180518112919.GI12217@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180518112919.GI12217@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18-May 13:29, Peter Zijlstra wrote: > On Fri, May 18, 2018 at 11:57:42AM +0100, Patrick Bellasi wrote: > > Thus, my simple (maybe dumb) questions are: > > - why can't we just fold turbo boost frequency into the existing concepts? > > - what are the limitations of such a "simple" approach? > > Perhaps... but does this not further complicate the whole capacity vs > util thing we already have in say the misfit patches? Not sure about that... > And the util_fits_capacity() thing from the EAS ones. In this case instead, if we can track somehow (not saying we can) what is the currently available "transient maximum capacity"... then a util_fits_capacity() should just look at that. If the transient capacity is already folded into cpu_capacity, as it is now for RT and IRQ pressure, then likely we don't have to change anything. > The thing is, we either need to dynamically scale the util or the > capacity or both. I think for Thermal there are patches out there that > drop the capacity. Not sure... but I would feel more comfortable by something which caps the maximum capacity. Meaning, eventually you can fill up the maximum possible capacity only "up to" a given value, because of thermal or other reasons most of the scheduler maybe doesn't even have to know why? > But we'd then have to do the same for turbo/vector and all the other > stuff as well. Otherwise we risk things like running at low U with 0% > idle and not triggering the tipping point between eas and regular > balancing. Interacting with the tipping point and/or OPP changes is indeed an interesting side of the problem I was not considering so far... But again, the tipping point could not be defined as a delta with respect to the "transient maximum capacity" ? > So either way around we need to know the 'true' max, either to fudge > util or to fudge capacity. Right, but what I see from a concepts standpoint is something like: +--+--+ cpu_capacity_orig (CONSTANT at boot time) | | | | | | HW generated constraints | v | +-----+ cpu_capacity_max (depending on thermal/turbo boost) | | | | | | SW generated constraints | v | +-----+ cpu_capacity (depending on RT/IRQ pressure) | | | | | | tipping point delta +--v--+ | | Energy Aware mode available capacity +-----+ Where all the wkp/lb heuristics are updated to properly consider the cpu_capacity_max metrics whenever it comes to know what is the max speed we can reach now on a CPU. > And I'm not sure we can know in some of these cases :/ Right, this schema will eventually work only under the hypothesis that "somehow" we can update cpu_capacity_max from HW events. Not entirely sure that's possible and/or at which time granularity on all different platforms. > And while Vincent's patches might have been inspired by another problem, > they do have the effect of always allowing util to go to 1, which is > nice for this. Sure, that's a nice point, but still I have the feeling that always reaching u=1 can defeat other interesting properties of a task, For example, comparing task requirements in different CPUs and/or at different times, which plays a big role for energy aware task placement decisions. -- #include Patrick Bellasi