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[209.132.180.67]) by mx.google.com with ESMTP id a35-v6si14111424pli.85.2018.05.21.04.37.44; Mon, 21 May 2018 04:37:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Xa4mIBdm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753147AbeEULhI (ORCPT + 99 others); Mon, 21 May 2018 07:37:08 -0400 Received: from mail-io0-f194.google.com ([209.85.223.194]:44736 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751895AbeEULhB (ORCPT ); Mon, 21 May 2018 07:37:01 -0400 Received: by mail-io0-f194.google.com with SMTP id d11-v6so13931890iof.11 for ; Mon, 21 May 2018 04:37:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=twO8X3bckUnxyug1/6GOVwPJGVgZxLYoLOGUkQQyfMc=; b=Xa4mIBdmPNeU1RHHAwjnsrrZ6GtsZ2+8B+DGbDBTNgAZIY5eKwRZb1kkeSISPX1f03 SLhSyS25s8A9bZ7Fam3QAz0vbW76O8Rg1NWiy9+qS/YCxlP6ewB0yyeuij3wMu3tWf1T g8Luwlhny14Erla2b9xRvl2QRLPo2Z9NweBd8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=twO8X3bckUnxyug1/6GOVwPJGVgZxLYoLOGUkQQyfMc=; b=TCoUNVekxpgRhbS9pSR3G8S30n2yDHUOT8y8XWXgQWjEwSC50joHU5p2olVFNQCyCZ qRGObhna+htNLvAhH5as+Dutc3Xfcv/DRO5IScWjsNYbcitj590TVXLjjK4LQYif1IzD YciVQQzam/VBsxJH2pEk9ujtTbV/T/qYjarh6094o/QGXImqJqP+tHpJaIHJ2sQu+yiO nmXy/hNIeCOKmhkwyHAH49+Kt+2fnagxxtbO+NQ8E8gH9Kw3RESrQroZSnaymHfVs1ir H4CcBRnUuqWDUfdcB0f08x6m2r8Dl6zXRHnJU4prYXU2hPwQIywmdUeVb9FzkC/TYTQE zSdQ== X-Gm-Message-State: ALKqPwfhoAFLgBQJ0MQip7I56S9d3QnhhBH2nYe0aMZ4jlVpz2NMG+3m 7FbRjhsUspKXJ8QJyjPoiUoN4O/85+b7MjbcMbkArA== X-Received: by 2002:a6b:1456:: with SMTP id 83-v6mr20608213iou.218.1526902620773; Mon, 21 May 2018 04:37:00 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a02:7347:0:0:0:0:0 with HTTP; Mon, 21 May 2018 04:37:00 -0700 (PDT) In-Reply-To: <1526681037-2074-3-git-send-email-scott.branden@broadcom.com> References: <1526681037-2074-1-git-send-email-scott.branden@broadcom.com> <1526681037-2074-3-git-send-email-scott.branden@broadcom.com> From: Ulf Hansson Date: Mon, 21 May 2018 13:37:00 +0200 Message-ID: Subject: Re: [PATCH 2/3] mmc: sdhci-iproc: fix 32bit writes for TRANSFER_MODE register To: Scott Branden Cc: Adrian Hunter , BCM Kernel Feedback , "linux-mmc@vger.kernel.org" , Linux ARM , Linux Kernel Mailing List , Corneliu Doban Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19 May 2018 at 00:03, Scott Branden wrote: > From: Corneliu Doban > > When the host controller accepts only 32bit writes, the value of the > 16bit TRANSFER_MODE register, that has the same 32bit address as the > 16bit COMMAND register, needs to be saved and it will be written > in a 32bit write together with the command as this will trigger the > host to send the command on the SD interface. > When sending the tuning command, TRANSFER_MODE is written and then > sdhci_set_transfer_mode reads it back to clear AUTO_CMD12 bit and > write it again resulting in wrong value to be written because the > initial write value was saved in a shadow and the read-back returned > a wrong value, from the register. > Fix sdhci_iproc_readw to return the saved value of TRANSFER_MODE > when a saved value exist. > Same fix for read of BLOCK_SIZE and BLOCK_COUNT registers, that are > saved for a different reason, although a scenario that will cause the > mentioned problem on this registers is not probable. > > Fixes: b580c52d58d9 ("mmc: sdhci-iproc: add IPROC SDHCI driver") > Signed-off-by: Corneliu Doban > Signed-off-by: Scott Branden Thanks, applied for fixes and by adding a stable tag! Kind regards Uffe > --- > drivers/mmc/host/sdhci-iproc.c | 30 +++++++++++++++++++++++++----- > 1 file changed, 25 insertions(+), 5 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c > index 6f430da..1f0ab08 100644 > --- a/drivers/mmc/host/sdhci-iproc.c > +++ b/drivers/mmc/host/sdhci-iproc.c > @@ -33,6 +33,8 @@ struct sdhci_iproc_host { > const struct sdhci_iproc_data *data; > u32 shadow_cmd; > u32 shadow_blk; > + bool is_cmd_shadowed; > + bool is_blk_shadowed; > }; > > #define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) > @@ -48,8 +50,22 @@ static inline u32 sdhci_iproc_readl(struct sdhci_host *host, int reg) > > static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg) > { > - u32 val = sdhci_iproc_readl(host, (reg & ~3)); > - u16 word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; > + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > + struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host); > + u32 val; > + u16 word; > + > + if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { > + /* Get the saved transfer mode */ > + val = iproc_host->shadow_cmd; > + } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && > + iproc_host->is_blk_shadowed) { > + /* Get the saved block info */ > + val = iproc_host->shadow_blk; > + } else { > + val = sdhci_iproc_readl(host, (reg & ~3)); > + } > + word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; > return word; > } > > @@ -105,13 +121,15 @@ static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg) > > if (reg == SDHCI_COMMAND) { > /* Write the block now as we are issuing a command */ > - if (iproc_host->shadow_blk != 0) { > + if (iproc_host->is_blk_shadowed) { > sdhci_iproc_writel(host, iproc_host->shadow_blk, > SDHCI_BLOCK_SIZE); > - iproc_host->shadow_blk = 0; > + iproc_host->is_blk_shadowed = false; > } > oldval = iproc_host->shadow_cmd; > - } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { > + iproc_host->is_cmd_shadowed = false; > + } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && > + iproc_host->is_blk_shadowed) { > /* Block size and count are stored in shadow reg */ > oldval = iproc_host->shadow_blk; > } else { > @@ -123,9 +141,11 @@ static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg) > if (reg == SDHCI_TRANSFER_MODE) { > /* Save the transfer mode until the command is issued */ > iproc_host->shadow_cmd = newval; > + iproc_host->is_cmd_shadowed = true; > } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { > /* Save the block info until the command is issued */ > iproc_host->shadow_blk = newval; > + iproc_host->is_blk_shadowed = true; > } else { > /* Command or other regular 32-bit write */ > sdhci_iproc_writel(host, newval, reg & ~3); > -- > 2.5.0 >