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[209.132.180.67]) by mx.google.com with ESMTP id a3-v6si7166612pgv.415.2018.05.21.21.23.43; Mon, 21 May 2018 21:23:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=QqHg8G+w; dkim=pass header.i=@codeaurora.org header.s=default header.b=aQet15CF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751311AbeEVEXU (ORCPT + 99 others); Tue, 22 May 2018 00:23:20 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53024 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751261AbeEVEXN (ORCPT ); Tue, 22 May 2018 00:23:13 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2EBD96028C; Tue, 22 May 2018 04:23:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526962993; bh=vEZ9/p9B+C6GSmOs/33IulQUEB86Cbn/cxvo6k1owrU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QqHg8G+wzIFqyd7pNrANtpI8eS/yS0cquk4o8ioD1d4SrSy5VpXzLuE/Ia1LjC5nr SecdhGL2PANweyYM8xryZdMCIejJKwoh/qR4gPr3bBd91qcBBEnzOTBacxeCQrgGOF vqqcdp9GO1lZtaTnIRWUvdPijVqzqeLU3d9afn/4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from sayalil-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sayalil@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A12D36071A; Tue, 22 May 2018 04:23:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526962991; bh=vEZ9/p9B+C6GSmOs/33IulQUEB86Cbn/cxvo6k1owrU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aQet15CFdBhQP4AXU+jvHqPQ0RsL7qMiu+J8Sd+c0j6UvXOMK63z/t/obZUZsScSZ 6C7sLY+xEYpK6PJayYKodG3mnSe9gsq05KrZ11eEgEhnAdRfGyVTaxvFllSHFbAfdz FYT1E072a9jf3W22DswXsVZzAimU7sB/TBUq8lU0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A12D36071A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sayalil@codeaurora.org From: Sayali Lokhande To: subhashj@codeaurora.org, cang@codeaurora.org, vivek.gautam@codeaurora.org, rnayak@codeaurora.org, vinholikatti@gmail.com, jejb@linux.vnet.ibm.com, martin.petersen@oracle.com, asutoshd@codeaurora.org Cc: linux-scsi@vger.kernel.org, Sayali Lokhande , linux-kernel@vger.kernel.org (open list) Subject: [PATCH RFC 2/3] scsi: ufs: Add ufs provisioning support Date: Tue, 22 May 2018 09:51:39 +0530 Message-Id: <1526962900-20683-3-git-send-email-sayalil@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526962900-20683-1-git-send-email-sayalil@codeaurora.org> References: <1526962900-20683-1-git-send-email-sayalil@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A new api ufshcd_do_config_device() is added in driver to suppoet UFS provisioning at runtime. Sysfs support is added to trigger provisioning. Device configuration descriptors or parameters are parsed from vendor specific provisioning data and passed via sysfs at runtime to provision ufs device. Signed-off-by: Sayali Lokhande --- drivers/scsi/ufs/ufs.h | 28 +++++++ drivers/scsi/ufs/ufshcd.c | 200 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/scsi/ufs/ufshcd.h | 1 + 3 files changed, 229 insertions(+) diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h index e15deb0..1f99904 100644 --- a/drivers/scsi/ufs/ufs.h +++ b/drivers/scsi/ufs/ufs.h @@ -333,6 +333,7 @@ enum { UFSHCD_AMP = 3, }; +#define UFS_BLOCK_SIZE 4096 #define POWER_DESC_MAX_SIZE 0x62 #define POWER_DESC_MAX_ACTV_ICC_LVLS 16 @@ -425,6 +426,33 @@ enum { MASK_TM_SERVICE_RESP = 0xFF, }; +struct ufs_unit_desc { + u8 bLUEnable; /* 1 for enabled LU */ + u8 bBootLunID; /* 0 for using this LU for boot */ + u8 bLUWriteProtect; /* 1 = power on WP, 2 = permanent WP */ + u8 bMemoryType; /* 0 for enhanced memory type */ + u32 dNumAllocUnits; /* Number of alloc unit for this LU */ + u8 bDataReliability; /* 0 for reliable write support */ + u8 bLogicalBlockSize; /* See section 13.2.3 of UFS standard */ + u8 bProvisioningType; /* 0 for thin provisioning */ + u16 wContextCapabilities; /* refer Unit Descriptor Description */ +}; + +struct ufs_config_descr { + u8 bNumberLU; /* Total number of active LUs */ + u8 bBootEnable; /* enabling device for partial init */ + u8 bDescrAccessEn; /* desc access during partial init */ + u8 bInitPowerMode; /* Initial device power mode */ + u8 bHighPriorityLUN; /* LUN of the high priority LU */ + u8 bSecureRemovalType; /* Erase config for data removal */ + u8 bInitActiveICCLevel; /* ICC level after reset */ + u16 wPeriodicRTCUpdate; /* 0 to set a priodic RTC update rate */ + u32 bConfigDescrLock; /* 1 to lock Configation Descriptor */ + u32 qVendorConfigCode; /* Vendor specific configuration code */ + struct ufs_unit_desc unit[8]; + u8 lun_to_grow; +}; + /* Task management service response */ enum { UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00, diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 1ab882f..9ae64e2 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -237,6 +237,7 @@ static int ufshcd_config_pwr_mode(struct ufs_hba *hba, struct ufs_pa_layer_attr *desired_pwr_mode); static int ufshcd_change_power_mode(struct ufs_hba *hba, struct ufs_pa_layer_attr *pwr_mode); +static int ufshcd_do_config_device(struct ufs_hba *hba); static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag) { return tag >= 0 && tag < hba->nutrs; @@ -3063,6 +3064,14 @@ static inline int ufshcd_read_power_desc(struct ufs_hba *hba, return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size); } +static inline int ufshcd_read_geometry_desc(struct ufs_hba *hba, + u8 *buf, + u32 size) +{ + return ufshcd_read_desc(hba, QUERY_DESC_IDN_GEOMETRY, 0, buf, size); +} + + static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size) { return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size); @@ -6352,6 +6361,197 @@ static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba) } /** + * ufshcd_do_config_device - API function for UFS provisioning + * hba: per-adapter instance + * Returns 0 for success, non-zero in case of failure. + */ +static int ufshcd_do_config_device(struct ufs_hba *hba) +{ + struct ufs_config_descr *cfg = &hba->cfgs; + int buff_len = QUERY_DESC_CONFIGURATION_DEF_SIZE; + u8 desc_buf[QUERY_DESC_CONFIGURATION_DEF_SIZE] = {0}; + int i, ret = 0; + int lun_to_grow = -1; + u64 qTotalRawDeviceCapacity; + u16 wEnhanced1CapAdjFac, wEnhanced2CapAdjFac; + u32 dEnhanced1MaxNAllocU, dEnhanced2MaxNAllocU; + size_t alloc_units, units_to_create = 0; + size_t capacity_to_alloc_factor; + size_t enhanced1_units = 0, enhanced2_units = 0; + size_t conversion_ratio = 1; + u8 *pt; + u32 blocks_per_alloc_unit = 1024; + int geo_len = hba->desc_size.geom_desc; + u8 geo_buf[hba->desc_size.geom_desc]; + unsigned int max_partitions = 9; + + WARN_ON(!hba || !cfg); + ufshcd_set_dev_ref_clk(hba); + + ret = ufshcd_read_geometry_desc(hba, geo_buf, geo_len); + if (ret) { + dev_err(hba->dev, "%s: Failed getting geometry_desc %d\n", + __func__, ret); + return ret; + } + + /* + * Get Geomtric parameters like total configurable memory + * quantity (Offset 0x04 to 0x0b), Capacity Adjustment + * Factors (Offset 0x30, 0x31, 0x36, 0x37), Max allocation + * units (Offset 0x2c to 0x2f, 0x32 to 0x35) used to configure + * the device logical units. + */ + qTotalRawDeviceCapacity = + (uint64_t)geo_buf[0x0b] | ((uint64_t)geo_buf[0x0a] << 8) | + ((uint64_t)geo_buf[0x09] << 16) | + ((uint64_t)geo_buf[0x08] << 24) | + ((uint64_t)geo_buf[0x07] << 32) | + ((uint64_t)geo_buf[0x06] << 40) | + ((uint64_t)geo_buf[0x05] << 48) | + ((uint64_t)geo_buf[0x04] << 56); + wEnhanced1CapAdjFac = + (uint16_t)geo_buf[0x31] | ((uint16_t)geo_buf[0x30] << 8); + wEnhanced2CapAdjFac = + (uint16_t)geo_buf[0x37] | ((uint16_t)geo_buf[0x36] << 8); + dEnhanced1MaxNAllocU = + (uint32_t)geo_buf[0x2f] | ((uint32_t)geo_buf[0x2e] << 8) | + ((uint32_t)geo_buf[0x2d] << 16) | + ((uint32_t)geo_buf[0x2c] << 24); + dEnhanced2MaxNAllocU = + (uint32_t)geo_buf[0x35] | ((uint32_t)geo_buf[0x34] << 8) | + ((uint32_t)geo_buf[0x33] << 16) | + ((uint32_t)geo_buf[0x32] << 24); + + capacity_to_alloc_factor = + (blocks_per_alloc_unit * UFS_BLOCK_SIZE) / 512; + + if (qTotalRawDeviceCapacity % capacity_to_alloc_factor != 0) { + dev_err(hba->dev, + "%s: Raw capacity(%llu) not multiple of alloc factor(%zu)\n", + __func__, qTotalRawDeviceCapacity, + capacity_to_alloc_factor); + return -EINVAL; + } + alloc_units = (qTotalRawDeviceCapacity / capacity_to_alloc_factor); + units_to_create = 0; + enhanced1_units = enhanced2_units = 0; + + /* + * Calculate number of allocation units to be assigned to a logical unit + * considering the capacity adjustment factor of respective memory type. + */ + for (i = 0; i < (max_partitions - 1) && + units_to_create <= alloc_units; i++) { + if ((cfg->unit[i].dNumAllocUnits % blocks_per_alloc_unit) == 0) + cfg->unit[i].dNumAllocUnits /= blocks_per_alloc_unit; + else + cfg->unit[i].dNumAllocUnits = + cfg->unit[i].dNumAllocUnits / blocks_per_alloc_unit + 1; + + if (cfg->unit[i].bMemoryType == 0) + units_to_create += cfg->unit[i].dNumAllocUnits; + else if (cfg->unit[i].bMemoryType == 3) { + enhanced1_units += cfg->unit[i].dNumAllocUnits; + cfg->unit[i].dNumAllocUnits *= + (wEnhanced1CapAdjFac / 0x100); + units_to_create += cfg->unit[i].dNumAllocUnits; + } else if (cfg->unit[i].bMemoryType == 4) { + enhanced2_units += cfg->unit[i].dNumAllocUnits; + cfg->unit[i].dNumAllocUnits *= + (wEnhanced1CapAdjFac / 0x100); + units_to_create += cfg->unit[i].dNumAllocUnits; + } else { + dev_err(hba->dev, "%s: Unsupported memory type %d\n", + __func__, cfg->unit[i].bMemoryType); + return -EINVAL; + } + } + if (enhanced1_units > dEnhanced1MaxNAllocU) { + dev_err(hba->dev, "%s: size %zu exceeds max enhanced1 area size %u\n", + __func__, enhanced1_units, dEnhanced1MaxNAllocU); + return -ERANGE; + } + if (enhanced2_units > dEnhanced2MaxNAllocU) { + dev_err(hba->dev, "%s: size %zu exceeds max enhanced2 area size %u\n", + __func__, enhanced2_units, dEnhanced2MaxNAllocU); + return -ERANGE; + } + if (units_to_create > alloc_units) { + dev_err(hba->dev, "%s: Specified size %zu exceeds device size %zu\n", + __func__, units_to_create, alloc_units); + return -ERANGE; + } + lun_to_grow = cfg->lun_to_grow; + if (lun_to_grow != -1) { + if (cfg->unit[i].bMemoryType == 0) + conversion_ratio = 1; + else if (cfg->unit[i].bMemoryType == 3) + conversion_ratio = (wEnhanced1CapAdjFac / 0x100); + else if (cfg->unit[i].bMemoryType == 4) + conversion_ratio = (wEnhanced2CapAdjFac / 0x100); + + cfg->unit[lun_to_grow].dNumAllocUnits += + ((alloc_units - units_to_create) / conversion_ratio); + dev_dbg(hba->dev, "%s: conversion_ratio %zu for lun %d\n", + __func__, conversion_ratio, i); + } + + /* Fill in the buffer with configuration data */ + pt = desc_buf; + *pt++ = 0x90; // bLength + *pt++ = 0x01; // bDescriptorType + *pt++ = 0; // Reserved in UFS2.0 and onward + *pt++ = cfg->bBootEnable; + *pt++ = cfg->bDescrAccessEn; + *pt++ = cfg->bInitPowerMode; + *pt++ = cfg->bHighPriorityLUN; + *pt++ = cfg->bSecureRemovalType; + *pt++ = cfg->bInitActiveICCLevel; + *pt++ = (cfg->wPeriodicRTCUpdate >> 8) & 0xff; + *pt++ = cfg->wPeriodicRTCUpdate & 0xff; + pt = pt + 5; // Reserved fields set to 0 + + /* Fill in the buffer with per logical unit data */ + for (i = 0; i < UFS_UPIU_MAX_GENERAL_LUN; i++) { + *pt++ = cfg->unit[i].bLUEnable; + *pt++ = cfg->unit[i].bBootLunID; + *pt++ = cfg->unit[i].bLUWriteProtect; + *pt++ = cfg->unit[i].bMemoryType; + *pt++ = (cfg->unit[i].dNumAllocUnits >> 24) & 0xff; + *pt++ = (cfg->unit[i].dNumAllocUnits >> 16) & 0xff; + *pt++ = (cfg->unit[i].dNumAllocUnits >> 8) & 0xff; + *pt++ = (cfg->unit[i].dNumAllocUnits) & 0xff; + *pt++ = cfg->unit[i].bDataReliability; + *pt++ = cfg->unit[i].bLogicalBlockSize; + *pt++ = cfg->unit[i].bProvisioningType; + *pt++ = (cfg->unit[i].wContextCapabilities >> 8) & 0xff; + *pt++ = cfg->unit[i].wContextCapabilities; + pt = pt + 3; // Reserved fields set to 0 + } + + ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_WRITE_DESC, + QUERY_DESC_IDN_CONFIGURATION, 0, 0, desc_buf, &buff_len); + + if (ret) { + dev_err(hba->dev, "%s: Failed writing descriptor. desc_idn %d, opcode %x ret %d\n", + __func__, QUERY_DESC_IDN_CONFIGURATION, + UPIU_QUERY_OPCODE_WRITE_DESC, ret); + return ret; + } + + if (cfg->bConfigDescrLock) { + ret = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, + QUERY_ATTR_IDN_CONF_DESC_LOCK, 0, 0, &cfg->bConfigDescrLock); + if (ret) + dev_err(hba->dev, "%s: Failed writing bConfigDescrLock %d\n", + __func__, ret); + } + + return ret; +} + +/** * ufshcd_probe_hba - probe hba to detect device and initialize * @hba: per-adapter instance * diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 0dcf113..0c4b683 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -550,6 +550,7 @@ struct ufs_hba { bool is_irq_enabled; u32 dev_ref_clk_freq; + struct ufs_config_descr cfgs; /* Interrupt aggregation support is broken */ #define UFSHCD_QUIRK_BROKEN_INTR_AGGR 0x1 -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project