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[209.132.180.67]) by mx.google.com with ESMTP id 91-v6si16150832plb.514.2018.05.22.02.07.33; Tue, 22 May 2018 02:07:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=L5WXXF9Y; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751575AbeEVJHW (ORCPT + 99 others); Tue, 22 May 2018 05:07:22 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:21631 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751311AbeEVJHU (ORCPT ); Tue, 22 May 2018 05:07:20 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4M968Ol026697; Tue, 22 May 2018 04:06:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1526979968; bh=rC2IGt71xFXfnNsTG0QYu+NhBfqlI6oei/tlBLMqwMU=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=L5WXXF9Y7drJJrF+4aGLQhsE6dTf+KoFrOlkvtfNwI6NY3NKRCmliKubyb7HSiV+V qKYBVbWyr1bI6o6Et/Ih77jCUK45IrjAjHdn6p04qbBhRa6DZkiyVUBIQ4C7EFxr+c xHLd206gI/hhnad76BrSZobX3QQ6njpDT0sNBlOI= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4M968pd030090; Tue, 22 May 2018 04:06:08 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 22 May 2018 04:06:08 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 22 May 2018 04:06:08 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4M95wup021230; Tue, 22 May 2018 04:06:00 -0500 Subject: Re: [PATCH v11 03/27] clk: davinci: psc: allow for dev == NULL To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <20180518164829.27052-1-david@lechnology.com> <20180518164829.27052-4-david@lechnology.com> From: Sekhar Nori Message-ID: <250d94db-c33f-51c9-99c1-3a4ddcd627fa@ti.com> Date: Tue, 22 May 2018 14:35:58 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180518164829.27052-4-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 18 May 2018 10:18 PM, David Lechner wrote: > On some davinci SoCs, we need to register the PSC clocks during early > boot because they are needed for clocksource/clockevent. These changes > allow for dev == NULL because in this case, we won't have a platform > device for the clocks. > > Some function declarations are moved to a public header files so that they can > be called from mach init code. > > Signed-off-by: David Lechner Reviewed-by: Sekhar Nori Thanks, Sekhar