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[209.132.180.67]) by mx.google.com with ESMTP id q1-v6si12869235pga.417.2018.05.22.04.27.30; Tue, 22 May 2018 04:27:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=InvAKVYL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751294AbeEVL0T (ORCPT + 99 others); Tue, 22 May 2018 07:26:19 -0400 Received: from mail-ot0-f194.google.com ([74.125.82.194]:41386 "EHLO mail-ot0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751114AbeEVL0P (ORCPT ); Tue, 22 May 2018 07:26:15 -0400 Received: by mail-ot0-f194.google.com with SMTP id t1-v6so20495627oth.8; Tue, 22 May 2018 04:26:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=WDJbIFsdFSRml3ihi4JDr/o814HtZh3yTB797IWWr7k=; b=InvAKVYL6EXAIwRdIEs1360QWjWMjgb60dboJnKVeQ07Z8X34CF4/MlG18NtXqqOfU uvlWUosxyxwMl3QCPqFYppODtENmOQqmg9Cj97B53pYly7fZ1q7LMZtFzzPIqfjkgC69 7juPkI/66DKONro1IeM1VaLmd3WBofkXe9uGPamNT1FA6e5fF1gQJSc3drkwNBdxws1P AAdZjDy61AYuu8zm6kf6nt/37+c84EVCDwGCvBkxTeWgD7NQcUq3VFmb5xfUYbHYUQQz utNwpQcar43VZqSc4VtoJU7OVycgTgbj5CTU02vG9f9jnjIo1DnndC38BzP2u6ndjSvN mQJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=WDJbIFsdFSRml3ihi4JDr/o814HtZh3yTB797IWWr7k=; b=avUJrTOgOr3Qkl7OrCXP4x2803iiCPWIB7xXCmUUeNiIJQ6lVRgl2ihJfjXdxxHIfa Z92P1OkMnfHdcOXhAiqCFyWR5kGkeI6uBZwzd/oLelZWjTFWH3Vd3Ih3HcfIXwt7SNUy ivEbYG/uK+yQ+qKJ4Is2JCZ/4JGRNrvbtAcjgxkqrXXxCpYgokizkvdnhDCeAAi3E0a/ Vhb1lRr8O7dA9WETBYBAN/Xgne20f71Kuj4DMRGFd/+Yyb2a7MqhFsGDZnEG+jvosSpy LlZVlrmCBszYdiOa3+new19UBuodH+oXklGiePWCdwnjHTTqINE0RVviexgYheJrHTSx YG9g== X-Gm-Message-State: ALKqPwcnsSBiGq3gxzx1QfIgsqSEUKWrfWLypsRaq1PdX8SO1LUiwnrD 2sig8WuXwL2ryfzUJjZsfjvZElBNs5cHbVPDojM= X-Received: by 2002:a9d:5508:: with SMTP id l8-v6mr14597462oth.159.1526988375046; Tue, 22 May 2018 04:26:15 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a9d:4c14:0:0:0:0:0 with HTTP; Tue, 22 May 2018 04:26:14 -0700 (PDT) In-Reply-To: <1526959560-6014-2-git-send-email-Anson.Huang@nxp.com> References: <1526959560-6014-1-git-send-email-Anson.Huang@nxp.com> <1526959560-6014-2-git-send-email-Anson.Huang@nxp.com> From: Fabio Estevam Date: Tue, 22 May 2018 08:26:14 -0300 Message-ID: Subject: Re: [PATCH 2/2] ARM: dts: imx6ul: add GPIO clocks To: Anson Huang Cc: Shawn Guo , Sascha Hauer , Fabio Estevam , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Michael Trimarchi , Matteo Lisi , NXP Linux Team , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-kernel , linux-clk Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 22, 2018 at 12:26 AM, Anson Huang wrote: > i.MX6UL has GPIO clock gates in CCM CCGR, add > clock property for GPIO driver to make sure all > GPIO banks work as expected. > > Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam