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[209.132.180.67]) by mx.google.com with ESMTP id x12-v6si17855964pln.97.2018.05.23.00.27.21; Wed, 23 May 2018 00:28:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=p3qhAvuc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754334AbeEWH07 (ORCPT + 99 others); Wed, 23 May 2018 03:26:59 -0400 Received: from mail-vk0-f68.google.com ([209.85.213.68]:44938 "EHLO mail-vk0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754330AbeEWH0b (ORCPT ); Wed, 23 May 2018 03:26:31 -0400 Received: by mail-vk0-f68.google.com with SMTP id x66-v6so12506075vka.11; Wed, 23 May 2018 00:26:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=xxNYf8Kbd2yx8miEkc+6bXwytijWVtgUpnSbvEihLrU=; b=p3qhAvucaHhJ7AUY7DS1Rpy5WmnBJNUmtplG0a9QMM56KDAh8489xYzVejbyQUcAho dyZPmssLxGhbYEcnUh/l2dYLN7RqnY+QkrWkaGWi+hKshf0CInR0r/MFfSa6HXFwzZL8 ILrSTA+XeMKlly5dhibdXHer1c9c20/VHtAnIzBBi1CKRQOJDmEgCaVHEtacaevKRCnK MrvNcfTy/fYz8IhGMtoIszHLgwrO1VhGOFPKpKUoqwMl+/l3xL4iTPTUof6Lh+d3GrpO vElS+G0+qaBe9htiCCEeysg1s5i2n7yJid2+M5VAzkHK1eTvynGQ8x7Ep8/DKFkest89 3/pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=xxNYf8Kbd2yx8miEkc+6bXwytijWVtgUpnSbvEihLrU=; b=YP2SEC+jurudeeftuEULRX47YpZ8N1jEjnSEnOF3Gfq7UZ/AnbHdcmEUZ/kzmEcuka TwKhJM1EsnNlhPHnnCTMcr/M42/4lkNbBAcp8bMqe8XtX5lc7YTv4MMo/YU5NB6qfqE2 bYUUF0PwQhSuCRo24tLvPH9NaeE6Sl946/tpWus9t58E9qK8pECi7pWv8kJGtdBF6zl2 W4ZtDz4TsCOyf/kJAzd0XdSRXwGQe2qlPiuUCT37wUhjUlVkLDDhj/zmLfuNFXDR2+Xi QVbGRwTDal1ofFmRqMf9BUd4bRCBhez1k8u1sCHcrII9UeqzoaQGRi8G3FNQJc8JxImG QdBA== X-Gm-Message-State: ALKqPwfZ2CV6eN5RxYk4Ipmi3Su3aWCutZYGW6zjGLeo9b3VsMahHAiL sVyvAxuVVDtE4/qujXgqEN6tGQxLiNDxWSXUY6M= X-Received: by 2002:a1f:2cc6:: with SMTP id s189-v6mr1003297vks.106.1527060390527; Wed, 23 May 2018 00:26:30 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a67:7a0a:0:0:0:0:0 with HTTP; Wed, 23 May 2018 00:26:30 -0700 (PDT) In-Reply-To: References: <1526983321-41949-1-git-send-email-michel.pollet@bp.renesas.com> <1526983321-41949-3-git-send-email-michel.pollet@bp.renesas.com> From: Geert Uytterhoeven Date: Wed, 23 May 2018 09:26:30 +0200 X-Google-Sender-Auth: SlBPPR4TA7gSeEAsGUxaLR3wkBo Message-ID: Subject: Re: [PATCH v6 2/6] dt-bindings: Add the rzn1-clocks.h file To: M P Cc: Michel Pollet , Linux-Renesas , Simon Horman , Phil Edworthy , Michel Pollet , Magnus Damm , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Geert Uytterhoeven , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-clk Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Michel, On Wed, May 23, 2018 at 8:44 AM, M P wrote: > On Tue, 22 May 2018 at 19:44, Geert Uytterhoeven > wrote: >> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet >> wrote: >> > This adds the constants necessary to use the renesas,rzn1-clocks driver. >> > >> > Signed-off-by: Michel Pollet >> > --- /dev/null >> > +++ b/include/dt-bindings/clock/rzn1-clocks.h > >> Given this is part of the DT ABI, and there exist multiple different RZ/N1 >> SoCs (and there are probably planned more), I wouldn't call this header >> file "rzn1-clocks.h", but e.g. "r9a06g032-clocks.h". > > Actually, no, there already are two r906g03X devices that will work > perfectly fine with this driver. We had that discussion before, and you > insist and me removing mentions of the rzn1 everywhere, however, this > applies to *two* devices already, and I'm supposed to upstream support for > them. I can't rename r9g06g032 because it is *inexact* that's why it's My worry is not that there are two r906g03X devices that will work fine with this driver, but that there will be other "rzn1" devices that will not work with these bindings (the header file is part of the bindings). Besides, RZ/N1D and RZ/N1S (Which apparently differ in packaging only? Oh no, RZ/N1D (the larger package) has less QSPI channels than RZ/N1S (the smaller package)), there's also (at least) RZ/N1L. > called rzn1. So unless you let me call it r9a06g0xx-clocks.h (which i know > you won't as per multiple previous discussions) this can't be called > r9a06g032 because it won't be fit for my purpose when I try to bring back > the RZ/N1S into the picture. You can add r9a06g033-clocks.h when adding support for RZ/N1S. > There are minor difference to clocking, Aha? > I don't know if Renesas plans to release any more rzn1's in this series, > but my little finger tells me this isn't the case. But regardless of what We thought the same thing when the first RZ member (RZ/A1H) showed up. Did we know this was not going to be the first SoC of a new RZ family, but the first SoC of the first subfamily (RZ/A) of the RZ family... And the various subfamilies bear not much similarity. > we plan, Marketing will screw it up. Correct. And to mitigate that, we have no other choice than to use the real part numbers to differentiate. Once bitten, twice shy. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds