Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp550440imm; Wed, 23 May 2018 01:19:46 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrTQX+/VfSVepqqZBRlDZe/o5mJW7SvjYDeAkLeAyxHpZAQAe8lIU56PvFmjPBTNHx89QHS X-Received: by 2002:a62:78c:: with SMTP id 12-v6mr1912768pfh.178.1527063586235; Wed, 23 May 2018 01:19:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527063586; cv=none; d=google.com; s=arc-20160816; b=bEFReNyOlsyFems2Lha+zd4/piIcsRY+Y3CZ8T/3uqxYaezBkwnOucPr1engeQbEyj fzwu3tmEHq43BGItxLnmWnhOA4RWQtgzg9ok6EVIQ3r7PpYeR+7JbAeGWvhHU44gA/NC gxn2eH88xpMTiW161FV47I5wypeDmhsci0EoMdHKYxQbN3HmVziPeIcjqKgLJFMeYzg8 ANJMcgfub4SYJqwuottZLX8lCsw5/5MROqXb1i0wdmL0os35We6fOliYdFGSwYnpKNXu Oq1RSWcx9ftoajNrgvXKcUfFHcOiFw4RGMtfqT0bg+91QZgxxBVElWv4jJhJIL+yK78S XSvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature :arc-authentication-results; bh=OUBQfKcGFVaXdMCN0QjKbxJe3twTpsnUbvr99wHtbM0=; b=eeJ12yhbqrX4HOtjx2rqtYvKL+OWQNpCA1io/OS5uVubVkXf/72eg8Ng4DvnsaiUGe rx3ho154J7XxTb+x+uQ1xuDDQoFXNTJMZ7rcBk/iSjiF1UigMgVLp4isp0t5WKXvbtA0 ufCY0nhXlBwXPjP2xzLi5tTRl3e4FWtFMu1GycA4kcpIOcR0MgkJNerWVGflOH+atOZ/ s84sOmjB4CX/zj3JfHvWuUYROPqrse2qPyglRdQ4WVuOwXfti9TfqkkTLRJagzvWeAag 3ybWHNlhgTxvafeQeUhTs8C7CGW+PWhCpVoW8yX8FDUhjvHl/l6ccacNnfgnpHXgrIYk l5kQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=UXjQVLaT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j9-v6si2750467pgn.86.2018.05.23.01.19.31; Wed, 23 May 2018 01:19:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=UXjQVLaT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932096AbeEWISO (ORCPT + 99 others); Wed, 23 May 2018 04:18:14 -0400 Received: from mail-io0-f194.google.com ([209.85.223.194]:44062 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754192AbeEWISJ (ORCPT ); Wed, 23 May 2018 04:18:09 -0400 Received: by mail-io0-f194.google.com with SMTP id d11-v6so21772624iof.11; Wed, 23 May 2018 01:18:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=OUBQfKcGFVaXdMCN0QjKbxJe3twTpsnUbvr99wHtbM0=; b=UXjQVLaTmIHUV3BlnoUAfxLAP8xget2COcIWpzuiIWwajqfwfzkqtEceGbSZBajunL dhbQnthd8FeXebn/JjwY2gsDzIz5yvkIMY7EInkynSKbtX1+n9GUnrUs0DdFkdx4uMqv kNHC0diFCYVW49Kb7h5S04gO5I9sINPmWO6L/c6DodO/OoJhRjs7KIp9xbvems3HQqM3 Ro37UnETeNTJPR4AMwb4T3Boa0Rb1yVJvIpKiQJPvojJ6wmOa78pkDT+J2NxQeYeimEO iXDpNOK5UhAs0jXkge/NiGLKLoirmdqODzlBfn0HC3Mvu12yL9k4J0ly+/rfnUly3cnd 75RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=OUBQfKcGFVaXdMCN0QjKbxJe3twTpsnUbvr99wHtbM0=; b=hyGvs95e8JVf4nTEF26O5rJ9lAxafRU6rOQn0GpUWBIFo7qcAm3W1hXxidshFGevcK l901//DoXBB+qMh4R4Ifr0P90UAkryhe3EuZcGls31DB7PW4owXd54qLxHgzvLwp97BY 9pj5Osa05wmVtU2XnbJRcsDTIQ5AeQ2WHl3nmsqIdSRAX5sxGF7cv9t2WoOo4VheIPNG XK1TWV6I6dswt7s8Vln/muikJkxWsb3e1XN2vosln9wEJWU5+YUXRVX5JwNhTN0z5FiK CiaboxHM7E6jgTv8WUt31uh4dQkEdBte2b19NCI+SV2BjzEWFW6uoAkMiJ/t2an84MIc mXeg== X-Gm-Message-State: ALKqPwdE7ytsvnRVtg/7Z/N2xNnet49woxyHbAywENBZkmPS8HFWWwXD Y2orJY22QHyCPvyQJJIZEVf+5ZxkiPS7wDeqgII= X-Received: by 2002:a5e:c001:: with SMTP id u1-v6mr1549542iol.10.1527063488713; Wed, 23 May 2018 01:18:08 -0700 (PDT) MIME-Version: 1.0 References: <1526983321-41949-1-git-send-email-michel.pollet@bp.renesas.com> <1526983321-41949-3-git-send-email-michel.pollet@bp.renesas.com> In-Reply-To: From: M P Date: Wed, 23 May 2018 09:17:57 +0100 Message-ID: Subject: Re: [PATCH v6 2/6] dt-bindings: Add the rzn1-clocks.h file To: Geert Uytterhoeven Cc: michel.pollet@bp.renesas.com, linux-renesas-soc@vger.kernel.org, Simon Horman , Phil Edworthy , buserror+upstream@gmail.com, Magnus Damm , robh+dt@kernel.org, mark.rutland@arm.com, Michael Turquette , sboyd@kernel.org, geert+renesas@glider.be, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Morning Geert, On Wed, 23 May 2018 at 08:26, Geert Uytterhoeven wrote: > Hi Michel, > On Wed, May 23, 2018 at 8:44 AM, M P wrote: > > On Tue, 22 May 2018 at 19:44, Geert Uytterhoeven > > wrote: > >> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet > >> wrote: > >> > This adds the constants necessary to use the renesas,rzn1-clocks driver. > >> > > >> > Signed-off-by: Michel Pollet > >> > --- /dev/null > >> > +++ b/include/dt-bindings/clock/rzn1-clocks.h > > > >> Given this is part of the DT ABI, and there exist multiple different RZ/N1 > >> SoCs (and there are probably planned more), I wouldn't call this header > >> file "rzn1-clocks.h", but e.g. "r9a06g032-clocks.h". > > > > Actually, no, there already are two r906g03X devices that will work > > perfectly fine with this driver. We had that discussion before, and you > > insist and me removing mentions of the rzn1 everywhere, however, this > > applies to *two* devices already, and I'm supposed to upstream support for > > them. I can't rename r9g06g032 because it is *inexact* that's why it's > My worry is not that there are two r906g03X devices that will work fine > with this driver, but that there will be other "rzn1" devices that will not > work with these bindings (the header file is part of the bindings). > Besides, RZ/N1D and RZ/N1S (Which apparently differ in packaging only? > Oh no, RZ/N1D (the larger package) has less QSPI channels than RZ/N1S > (the smaller package)), there's also (at least) RZ/N1L. > > called rzn1. So unless you let me call it r9a06g0xx-clocks.h (which i know > > you won't as per multiple previous discussions) this can't be called > > r9a06g032 because it won't be fit for my purpose when I try to bring back > > the RZ/N1S into the picture. > You can add r9a06g033-clocks.h when adding support for RZ/N1S. So it is now acceptable to duplicate a huge amount of code, and constants when in fact there differences are so minor they would require minimal amount of code to take care of them? That just flies straight against my 30+ years of programming -- We're going to have twice the *identical* code, twice the header, and completely incompatible device tree files -- I mean, *right now* our rzn1.dtsi works *as is* on the 1D and 1S, we've got ONE file to maintain, and you can switch your CPU board from 1D to 1S and your 'board file' can stay the same. Wasn't it the idea of that stuff in the first place? Isn't it in the customer/engineer interest to be able to cross grade from one manufacturer's device *in the same series* to another without having to duplicate his whole board file? > > There are minor difference to clocking, > Aha? Sure, 1S doesn't' have DDR, 1D doesn't have the second QSPI. That's about it (I lie, theres a few other bits I'm sure). It's not like it won't even *work* or anything, the registers are there, the bit positions are there, all is the same, I'm *sure* that's what the compatible="" thing were supposed to be used for, isn't it? Heck, I'm pretty sure there's a register in sysctrl, that tells me that anyway, so I wouldn't even have to have a special compatible= -- I didn't do it since the driver is already so big. > > I don't know if Renesas plans to release any more rzn1's in this series, > > but my little finger tells me this isn't the case. But regardless of what > We thought the same thing when the first RZ member (RZ/A1H) showed up. > Did we know this was not going to be the first SoC of a new RZ family, but > the first SoC of the first subfamily (RZ/A) of the RZ family... And the > various subfamilies bear not much similarity. > > we plan, Marketing will screw it up. > Correct. And to mitigate that, we have no other choice than to use the real > part numbers to differentiate. Once bitten, twice shy. It's not mitigation from where I stand -- it's a gigantic kludge; To handle one exception, you throw away the baby with the bathwater. From where I sit, it's like having to a different screwdriver for the screws on the left of a panel vs the right of the panel. Sorry to come out as pretty miffed -- I've just spent weeks polishing up a driver to make it more or less similar to what they were 10 years ago (whoo look a platform file with a big table in it!), after throwing away all the work I had done to make it all device-tree based and make the code as agnostic as we could -- and now it turns out we need to make it even worse by throwing away the fact it actually *does* work on two SoC -- and that just because... because what, again? What about *making up names* -- The 'family names' can/will change -- the part numbers are *too limited in scope* -- why not just make up names? does it matter as long as it's close to reality and are documented? I dunno, "rzn1_18" or "rzn1_mk1" and so we have a way out when they release a new one next year? It seems to be working fine for cars "I got a 2018's "... Cheers, Michel > Gr{oetje,eeting}s, > Geert > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds