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[209.132.180.67]) by mx.google.com with ESMTP id c18-v6si18546216plo.185.2018.05.23.01.58.03; Wed, 23 May 2018 01:58:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@agner.ch header.s=dkim header.b=INdisCXh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754618AbeEWI5j (ORCPT + 99 others); Wed, 23 May 2018 04:57:39 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:51434 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754334AbeEWI5g (ORCPT ); Wed, 23 May 2018 04:57:36 -0400 Received: from webmail.kmu-office.ch (unknown [IPv6:2a02:418:6a02::a3]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 08E235C09D0; Wed, 23 May 2018 10:57:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1527065855; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hdhwtvmOzISpC6BEgtD/EFuWl4CdDSWUVR0vhZI4L5o=; b=INdisCXhI00oYyvQAG5+OmuY34KDdrigVCbDzAIlorDPbklhNZ/vzufQInqOwUvHzBy4zj sWq6PQKnnqTzVnTi2uMgbNtaawRwVwGOlOgR8Hs8dFdR5388FwWPS4QWakq522nV12uaBG ZcepgOqoXDMro/LXblmCAAZvy2uDQec= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Wed, 23 May 2018 10:57:34 +0200 From: Stefan Agner To: Krzysztof Kozlowski Cc: Rob Herring , Mark Rutland , Thierry Reding , Jonathan Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Marcel Ziswiler , Lucas Stach Subject: Re: [PATCH v5 1/3] ARM: dts: tegra: Remove skeleton.dtsi and fix DTC warnings for /memory In-Reply-To: References: <1526543103-21668-1-git-send-email-krzk@kernel.org> Message-ID: X-Sender: stefan@agner.ch User-Agent: Roundcube Webmail/1.3.4 X-Spamd-Result: default: False [-3.02 / 15.00]; TO_MATCH_ENVRCPT_ALL(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_ZERO(0.00)[0]; ASN(0.00)[asn:29691, ipnet:2a02:418::/29, country:CH]; RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-2.92)[99.65%]; ARC_NA(0.00)[] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23.05.2018 10:34, Krzysztof Kozlowski wrote: > On Wed, May 23, 2018 at 10:22 AM, Stefan Agner wrote: >> On 23.05.2018 09:05, Krzysztof Kozlowski wrote: >>> On Thu, May 17, 2018 at 1:39 PM, Stefan Agner wrote: >>>> On 17.05.2018 09:45, Krzysztof Kozlowski wrote: >>>> Could we not add >>>> >>>> memory { device_type = "memory"; }; >>>> >>>> in the SoC level device trees? >>>> >>>> This would save device_type in all other instances. >>>> >>>> That is also how it is done in other places, e.g. >>>> arch/arm/boot/dts/imx6qdl.dtsi >>> >>> Not really because the unit address will not match between different >>> boards. The imx6qdl, as I see, has the same issue: >>> - imx6qdl.dtsi defines "memory" node >>> - imx6dl-apf6dev.dts includes the previous and defines "memory@10000000" >>> >>> This is wrong - two memory nodes. >>> >> >> Hm I see. We could add >> >> memory@0 { device_type = "memory"; }; >> >> Since the reg property is specified in the board level device tree it >> would be still fine? >> >> Or probably better to provide a complete spec with length zero: >> >> memory@0 { >> device_type = "memory"; >> reg = <0x0 0x0>; >> }; >> >> Even some boards do that and assume that boot loader will fill it >> correctly, so that should be fine. > > That could be the solution although tegra30-apalis.dtsi is a problem > here. For Tegra 114, 124 and 20 it would work fine - all boards from > given SoC have the same address of memory (0x0 or 0x80000000). However > for Tegra30 the Apalis did not have any memory reg before so I am not > sure what should be used. I added 0x0. The other Tegra30 boards have > memory@80000000. The start address of memory is not something a board can decide on: That is hard wired in the SoC... In the Tegra 3 case the start address of main memory is 0x80000000. So memory@80000000 { reg = <0x80000000 0x0>; }; Should be fine. Or you can use 0x40000000 (1GiB) since that is the smallest configuration Toradex sells currently. memory@80000000 { reg = <0x80000000 0x40000000>; }; Sorry for the hassle and thanks for fixing this! -- Stefan