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In-Reply-To: <1526299191-1140-1-git-send-email-david.wu@rock-chips.com>
References: <1526299191-1140-1-git-send-email-david.wu@rock-chips.com>
From:   Linus Walleij <linus.walleij@linaro.org>
Date:   Wed, 23 May 2018 11:11:27 +0200
Message-ID: <CACRpkdZ1J0O6QD_N9fr1HNHwXqe6Kg4rKMimUT7SDHYTzKqfRw@mail.gmail.com>
Subject: Re: [PATCH] pinctrl: rockchip: Add pinctrl support for PX30
To:     David Wu <david.wu@rock-chips.com>
Cc:     =?UTF-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>,
        Tao Huang <huangtao@rock-chips.com>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
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On Mon, May 14, 2018 at 1:59 PM, David Wu <david.wu@rock-chips.com> wrote:

> There are 4 banks (GPIO0 ~ GPIO3), bank0 is in PD_PMU
> subsystem, bank1/bank2/bank3 are in PD_BUS subsystem.
>
> Signed-off-by: David Wu <david.wu@rock-chips.com>

Patch applied with Heiko's review tag.

Yours,
Linus Walleij