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[209.132.180.67]) by mx.google.com with ESMTP id f10-v6si1163130plt.9.2018.05.23.04.09.37; Wed, 23 May 2018 04:09:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=RBEopOEc; dkim=pass header.i=@codeaurora.org header.s=default header.b=JSaO24Dk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932542AbeEWLGg (ORCPT + 99 others); Wed, 23 May 2018 07:06:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51668 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932312AbeEWLGe (ORCPT ); Wed, 23 May 2018 07:06:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 053B76090E; Wed, 23 May 2018 11:06:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527073594; bh=xg6GfIDw2Xvl+20USwKEBmIsCKQZtd1o0Q8DkM/z3jI=; h=From:To:Cc:References:In-Reply-To:Subject:Date:From; b=RBEopOEcbj2gai/b5nS4joAs21c01Bh8GUpp8uXNNUvZ930YaIB6XkHzpyHs4FaiD l6Pnm+X+kmffaht/qij8f49InUEYmmpCpgOj3ca9e6PLODBz6Xj2L5VJQKkE7cScVY I9j4G1MjZFEpi/+oIb+ZCL8YHKQ7opRtrVK56UI8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from ilial (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: ilialin@codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 277BB602BC; Wed, 23 May 2018 11:06:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527073589; bh=xg6GfIDw2Xvl+20USwKEBmIsCKQZtd1o0Q8DkM/z3jI=; h=From:To:Cc:References:In-Reply-To:Subject:Date:From; b=JSaO24DkMVaX8euiKMSMOPUwMf8U8vWguOcUf0GpGfDrSuxcphZWwwRQMjIad8qt4 CwKkn3asx/wWMAtZxJfoOYVXl/tI/OEgJxbkHgCDHYlxbPmea+ys4270SHHycb3GFs itNV4GjdrAORLpvyKDLZnC7qA7eTmme6D6WM0F4c= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 277BB602BC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: To: "'Sudeep Holla'" Cc: , , , , , , , , References: <1527068454-28921-1-git-send-email-ilialin@codeaurora.org> <1527068454-28921-2-git-send-email-ilialin@codeaurora.org> <3f1ca60e-7aa8-fccc-ab1c-4b7c37731cce@arm.com> In-Reply-To: <3f1ca60e-7aa8-fccc-ab1c-4b7c37731cce@arm.com> Subject: RE: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver Date: Wed, 23 May 2018 14:06:24 +0300 Message-ID: <002901d3f286$198878b0$4c996a10$@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHGHkKLWrrdHode7ZinDUAwaNCKTQIQamVJAy14mKykLuAkUA== Content-Language: en-us Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Sudeep Holla > Sent: Wednesday, May 23, 2018 13:40 > To: Ilia Lin ; vireshk@kernel.org; nm@ti.com; > sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com; > rjw@rjwysocki.net; linux-pm@vger.kernel.org; = devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org > Cc: Sudeep Holla > Subject: Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver >=20 >=20 >=20 > On 23/05/18 10:40, Ilia Lin wrote: > > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO > > processors, the CPU frequency subset and voltage value of each OPP > > varies based on the silicon variant in use. Qualcomm Process Voltage > > Scaling Tables defines the voltage and frequency value based on the > > msm-id in SMEM and speedbin blown in the efuse combination. > > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from = the > > SoC to provide the OPP framework with required information. > > This is used to determine the voltage and frequency value for each = OPP > > of > > operating-points-v2 table when it is parsed by the OPP framework. > > > > Signed-off-by: Ilia Lin >=20 > [...] >=20 > > + pdev =3D platform_device_register_simple("cpufreq-dt", -1, NULL, = 0); > > + if (!IS_ERR(pdev)) > > + return 0; > > + > > + ret =3D PTR_ERR(pdev); > > + dev_err(cpu_dev, "Failed to register platform device\n"); > > + > > +free_opp: > > + for_each_possible_cpu(cpu) { > > + if (IS_ERR_OR_NULL(opp_tables[cpu])) > > + break; > > + dev_pm_opp_put_supported_hw(opp_tables[cpu]); > > + } > > +free_np: > > + of_node_put(np); > > + > > + return ret; > > +} > > +late_initcall(qcom_cpufreq_kryo_driver_init); >=20 > Any particular reason why this *has* to be late initcall ? > Please change it to module_initcall otherwise. The purpose is to give the cpufreq-dt the time to register the driver = and only then my driver will add the platform device. > Also address the of_node comments from Viresh. >=20 > Otherwise, it looks good. > -- > Regards, > Sudeep