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[209.132.180.67]) by mx.google.com with ESMTP id i131-v6si1004437pgc.571.2018.05.23.04.32.30; Wed, 23 May 2018 04:32:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Sgm+QzdW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932596AbeEWLbL (ORCPT + 99 others); Wed, 23 May 2018 07:31:11 -0400 Received: from mail-io0-f195.google.com ([209.85.223.195]:37807 "EHLO mail-io0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932071AbeEWLbI (ORCPT ); Wed, 23 May 2018 07:31:08 -0400 Received: by mail-io0-f195.google.com with SMTP id e20-v6so22328349iof.4 for ; Wed, 23 May 2018 04:31:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=dJi3ZGO951fHJBlkQ1XaHNc5rGwU1khqyMUs6Sf7oP0=; b=Sgm+QzdWd5DxEyjawbd3brT2hR6oURtYSO2yKMZUvjVbcMumR5ay2b2tSQwU6PIE9C K3CX/PgZT7FU5miGoJsQt/N4v9WxWd/w14ucEJR88jQKhApwn6LaANm4oV4JcqP9enxK aYfnvLvd4m1i+OKpOkRDWUsiEHLSK282oGWFQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=dJi3ZGO951fHJBlkQ1XaHNc5rGwU1khqyMUs6Sf7oP0=; b=NiZpzr0eap6fzVhIFcIsrvAHN1Ub83DGsIA435S1K4b2Ld0RMft/eZ22ckgyKp5EME 6JIAWRq9ZSQzdxiE2K3icLkK1uceJlIiB2VAsPOLHr0clYQVs3Oga5kCvftMP7XTfL7g HkBFfsHtJX8pFBK7swaYGCCRao5f7u6iPBvESz99pMoXGUk5RQQ0hbocFjea4xEKlFq2 unfQ5X1RLf40KbfB7OprrVENZ9S3GWaGg+x2PEescD7FSFjOeEmirHFfXwlLZxImtl7B kSlOXfGPvF0IRkPBv1D57VsqVzSTwX4y26HeFtRvF6fh24qWuSCmkTTSucg3nmn4m2cZ fvaw== X-Gm-Message-State: ALKqPwcpeSlXqoMxbNYMBJ40PAB3XzHLBx56/LdC8/hcvyLP57Y+w13v cn7IlmPid2ezxoMLnF0zi0FClKjFnEwzFrRYN2a9Bw== X-Received: by 2002:a6b:6518:: with SMTP id z24-v6mr1402836iob.78.1527075067734; Wed, 23 May 2018 04:31:07 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a02:4bc3:0:0:0:0:0 with HTTP; Wed, 23 May 2018 04:31:07 -0700 (PDT) In-Reply-To: <002901d3f286$198878b0$4c996a10$@codeaurora.org> References: <1527068454-28921-1-git-send-email-ilialin@codeaurora.org> <1527068454-28921-2-git-send-email-ilialin@codeaurora.org> <3f1ca60e-7aa8-fccc-ab1c-4b7c37731cce@arm.com> <002901d3f286$198878b0$4c996a10$@codeaurora.org> From: Viresh Kumar Date: Wed, 23 May 2018 17:01:07 +0530 Message-ID: Subject: Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver To: Ilia Lin Cc: Sudeep Holla , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Mark Rutland , "Rafael J. Wysocki" , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23 May 2018 at 16:36, wrote: > > >> -----Original Message----- >> From: Sudeep Holla >> Sent: Wednesday, May 23, 2018 13:40 >> To: Ilia Lin ; vireshk@kernel.org; nm@ti.com; >> sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com; >> rjw@rjwysocki.net; linux-pm@vger.kernel.org; devicetree@vger.kernel.org; >> linux-kernel@vger.kernel.org >> Cc: Sudeep Holla >> Subject: Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver >> >> >> >> On 23/05/18 10:40, Ilia Lin wrote: >> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO >> > processors, the CPU frequency subset and voltage value of each OPP >> > varies based on the silicon variant in use. Qualcomm Process Voltage >> > Scaling Tables defines the voltage and frequency value based on the >> > msm-id in SMEM and speedbin blown in the efuse combination. >> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the >> > SoC to provide the OPP framework with required information. >> > This is used to determine the voltage and frequency value for each OPP >> > of >> > operating-points-v2 table when it is parsed by the OPP framework. >> > >> > Signed-off-by: Ilia Lin >> >> [...] >> >> > + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); >> > + if (!IS_ERR(pdev)) >> > + return 0; >> > + >> > + ret = PTR_ERR(pdev); >> > + dev_err(cpu_dev, "Failed to register platform device\n"); >> > + >> > +free_opp: >> > + for_each_possible_cpu(cpu) { >> > + if (IS_ERR_OR_NULL(opp_tables[cpu])) >> > + break; >> > + dev_pm_opp_put_supported_hw(opp_tables[cpu]); >> > + } >> > +free_np: >> > + of_node_put(np); >> > + >> > + return ret; >> > +} >> > +late_initcall(qcom_cpufreq_kryo_driver_init); >> >> Any particular reason why this *has* to be late initcall ? >> Please change it to module_initcall otherwise. > > The purpose is to give the cpufreq-dt the time to register the driver and only then my driver will add the platform device. That isn't required, the device and its driver can be registered in any order.