Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp998498imm; Wed, 23 May 2018 08:43:09 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoIAa8dLUEXp2E1Pd4Tdtm2S5I/4wWaTLu0eVNhunwxgqCWuXkoNbdON7lHz/ECgKGtUMWw X-Received: by 2002:a63:711e:: with SMTP id m30-v6mr2708695pgc.90.1527090188987; Wed, 23 May 2018 08:43:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527090188; cv=none; d=google.com; s=arc-20160816; b=TFfPLkpJ5Hfkr9uD9KzqOsrU1Wzsb/R1glKklvlUJh7O2bcUxTW/9aVVI02SCHksqD 4y8c1SC/yv1QCY5Zq19EENiTa1W/z4ZVi0sSKtFY2erkPodg3b44lfC0ildtqpiQvtXH PlVx5TpP3qkERqhfH7pv0pOPoFjL08jA6+tirWNVMGOgCvsV2J1y61kuZ73uXuq1c6A5 iubxjBng6Z/3HzatAiSGzqvUJoEh0Gq5oy8Z40ZagFNDNpiG+DvxTsan2DYuuI33TCc7 vHRWBF78dm539/EGFD9L6kWBx5SIzOP2ZVp3R77kmZ4gcncs3ZAPvWtJi4i+fzg6T/UW 2ksA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-disposition :content-transfer-encoding:mime-version:in-reply-to:references :subject:cc:to:from:date:message-id:arc-authentication-results; bh=/MZmdOf7Z/Z3jv7LlzsKC2/cBlDFOpJkBVHXtntqDXw=; b=yH4kJ66I9zEm6wENBoUbTJUowg9aXkcnoI0UnjTsA17gYFWetu79jWgupG/eYil7fS cvWldMmOzEwkFvn5wSKlx26H7AyY+9b+PuOT7T9pn1bqhFrW1XWSighfM+NBm4bJmraI 1SlcXIQ9DqZQaifYQNaq6NmyjiilrZSNA/BHoNs/YtQCsEDc5Pmmgvx5PluXJBjfxtmJ G34FLwmDAlr0IQ8UByR58DQn03v+FA0j5MFjUTVFMdKk7jISUwKvEFgoXUXvEyr08QaJ C499xByHMo2OhYyBWddpE3CgtuaoYAS+0sRljYWKhn1JAmYtklGpnqEkxS2wHypYJ37z XORw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 34-v6si18548857plb.230.2018.05.23.08.42.54; Wed, 23 May 2018 08:43:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933653AbeEWPl1 convert rfc822-to-8bit (ORCPT + 99 others); Wed, 23 May 2018 11:41:27 -0400 Received: from prv1-mh.provo.novell.com ([137.65.248.33]:39496 "EHLO prv1-mh.provo.novell.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932578AbeEWPlY (ORCPT ); Wed, 23 May 2018 11:41:24 -0400 Received: from INET-PRV1-MTA by prv1-mh.provo.novell.com with Novell_GroupWise; Wed, 23 May 2018 09:41:23 -0600 Message-Id: <5B058BA002000078001C523F@prv1-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 18.0.0 Date: Wed, 23 May 2018 09:41:20 -0600 From: "Jan Beulich" To: "Boris Ostrovsky" Cc: , "xen-devel" , "Juergen Gross" , Subject: Re: [PATCH v5 1/2] xen/PVH: Set up GS segment for stack canary References: <20180523143002.29252-1-boris.ostrovsky@oracle.com> <20180523143002.29252-2-boris.ostrovsky@oracle.com> In-Reply-To: <20180523143002.29252-2-boris.ostrovsky@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> On 23.05.18 at 16:30, wrote: > @@ -98,6 +101,12 @@ ENTRY(pvh_start_xen) > /* 64-bit entry point. */ > .code64 > 1: > + /* Set base address in stack canary descriptor. */ > + mov $MSR_GS_BASE,%ecx > + mov $_pa(canary), %rax > + xor %rdx, %rdx Why rax and rdx instead of eax and edx? In the former case, the relocation produced might confuse whatever entity processing it (it'll have a sign-extended 32-bit quantity to deal with, which wouldn't allow representing an address in the [2Gb, 4Gb) range). In the latter case, while surely neither performance nor code size matter much here, it's still a bad precedent (people copy-and-paste code all the time): Zero-ing of registers should generally use the 32-bit forms of the insn. Gas has actually gained an optimization mode recently (upon request from Linus and the x86 maintainers) to silently "repair" such inefficiencies. Jan