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[209.132.180.67]) by mx.google.com with ESMTP id i7-v6si15045289pgq.507.2018.05.23.08.42.57; Wed, 23 May 2018 08:43:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=1jhzn90P; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933624AbeEWPmf (ORCPT + 99 others); Wed, 23 May 2018 11:42:35 -0400 Received: from mail.kernel.org ([198.145.29.99]:49096 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933471AbeEWPmc (ORCPT ); Wed, 23 May 2018 11:42:32 -0400 Received: from mail-qk0-f169.google.com (mail-qk0-f169.google.com [209.85.220.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8E8C220879; Wed, 23 May 2018 15:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1527090151; bh=MP0vpsjsJKf+0bFFvTvjVtX2qaG0sjX9y9n1p0ModHg=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=1jhzn90PPjIhe+Teg2tFjJxchcB8pIIkOxfHO3BuQylm2LNWLNjLyj5Uz3Q6UJIYi sz/hTaJ+hItDgauBQKV+ZpHTFhIXyPgYjE5mtfHDTWcYrLgy8LwCgrevifzoqmM+vq Xc/kFhYjKZFq0n6u/gBn6FX2K/Y9bh/qGkUd17qs= Received: by mail-qk0-f169.google.com with SMTP id p186-v6so17821462qkd.1; Wed, 23 May 2018 08:42:31 -0700 (PDT) X-Gm-Message-State: ALKqPweB6rtOxvdPi4kGNT7rLGvBia1qc44FnM+uJgYFYC69J/aU6RMs r8BOoPWzGcwRoXJxE+zjDqck6g16yuDz9rMoAQ== X-Received: by 2002:a37:58c1:: with SMTP id m184-v6mr2917752qkb.213.1527090150668; Wed, 23 May 2018 08:42:30 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a0c:9b02:0:0:0:0:0 with HTTP; Wed, 23 May 2018 08:42:10 -0700 (PDT) In-Reply-To: References: <1526983321-41949-1-git-send-email-michel.pollet@bp.renesas.com> <1526983321-41949-4-git-send-email-michel.pollet@bp.renesas.com> <20180522160913.GA7755@rob-hp-laptop> From: Rob Herring Date: Wed, 23 May 2018 10:42:10 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v6 3/6] dt-bindings: clock: renesas,rzn1-clocks: document RZ/N1 clock driver To: M P Cc: Michel Pollet , "open list:MEDIA DRIVERS FOR RENESAS - FCP" , Simon Horman , Phil Edworthy , Michel Pollet , Magnus Damm , Mark Rutland , Michael Turquette , Stephen Boyd , Geert Uytterhoeven , devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" , linux-clk Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 23, 2018 at 1:52 AM, M P wrote: > Hi Rob, > > On Tue, 22 May 2018 at 17:09, Rob Herring wrote: > >> On Tue, May 22, 2018 at 11:01:23AM +0100, Michel Pollet wrote: >> > The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver >> > to provide the SoC clock infrastructure for Linux. >> > >> > This documents the driver bindings. >> > >> > Signed-off-by: Michel Pollet >> > --- >> > .../bindings/clock/renesas,rzn1-clocks.txt | 44 > ++++++++++++++++++++++ >> > 1 file changed, 44 insertions(+) >> > create mode 100644 > Documentation/devicetree/bindings/clock/renesas,rzn1-clocks.txt >> > >> > diff --git > a/Documentation/devicetree/bindings/clock/renesas,rzn1-clocks.txt > b/Documentation/devicetree/bindings/clock/renesas,rzn1-clocks.txt >> > new file mode 100644 >> > index 0000000..0c41137 >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/clock/renesas,rzn1-clocks.txt >> > @@ -0,0 +1,44 @@ >> > +* Renesas RZ/N1 Clock Driver >> > + >> > +This driver provides the clock infrastructure used by all the other > drivers. > >> Bindings document h/w not drivers. > >> > + >> > +One of the 'special' feature of this infrastructure is that Linux > doesn't > >> Bindings are not just for Linux. > >> > +necessary 'own' all the clocks on the SoC, some other OS runs on >> > +the Cortex-M3 core and that OS can access and claim it's own clocks. > >> How is this relevant to the binding? > > Well you just said it, if the binding is not just for linux, it's probably > a good idea to mention it somewhere since I can promise you it's *not* > documented in the hardware manual. Whatever this binding is for, it's > relevant to point out it is different from the other clock drivers in the > same directory... ? That's not an uncommon issue (sometimes it's secure world that owns the clocks, not even a different processor). I'm just not sure what I do with this information. It doesn't tell me which clocks are owned by the M3 or not. >> > + >> > +Required Properties: >> > + >> > + - compatible: Must be >> > + - "renesas,r9a06g032-clocks" for the RZ/N1D >> > + and "renesas,rzn1-clocks" as a fallback. > >> Is "clocks" how the chip reference manual refers to this block? > > No, the block is called 'sysctrl' and has tons of other stuff in there. > I've tried multiple times to get a 'sysctrl' driver in the previous > versions of the patch, in various shape or form, and I can't because I'd be > supposed to 'document' binding for stuff that has no code, no purpose, no > testing, and have all wildly different topics. So, after some more > lengthily discussion with Geert, we've decided to make the 'primary' > feature of that block (clocks) as a driver, and see from there onward. If you are referring to Geert's reply on v4, then this is not how I interpreted it. I understood it as make the clock driver bind to the sysctrl node and the clock driver can register other functions like reset. Then later if you need multiple drivers, you can make an MFD driver that binds to the sysctrl node and creates child devices to bind sub-drivers (like clocks) to. But the DT doesn't change in the process wrt clocks. You don't have to have a driver for everything, but the binding should be as complete as possible and done in an extendable way. The way you have done it now is not. I can already see that at some point you will want to break things and do something like this: { compatible = "renesas,r9a06g032-sysctrl"; ... { compatible = "renesas,r9a06g032-clocks"; ... }; }; Which is likely wrong because there's no need to have a child node like that. The parent node can be the clock provider (and any other provider). There are cases when child nodes do make sense, but we need a more complete binding to make that decision. Evolving it one feature at a time doesn't work. Rob