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[209.132.180.67]) by mx.google.com with ESMTP id u3-v6si20957886plb.2.2018.05.24.00.41.19; Thu, 24 May 2018 00:41:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WUL5bpGx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935756AbeEXHgN (ORCPT + 99 others); Thu, 24 May 2018 03:36:13 -0400 Received: from mail-io0-f193.google.com ([209.85.223.193]:43443 "EHLO mail-io0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935498AbeEXHgK (ORCPT ); Thu, 24 May 2018 03:36:10 -0400 Received: by mail-io0-f193.google.com with SMTP id t23-v6so1131219ioc.10 for ; Thu, 24 May 2018 00:36:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=K5QdhLV+eopIkl2+uwGyhRF0Uu/5wiGpUzStklvmUkI=; b=WUL5bpGxYF6iDBwW1Un8iNc1mmbvx+JdCF9+Drs9/ofvdyrW3wtHnYVDIYQ3lTgYMk lPL5P1qsQ7jQNCuX1rjDmKqxZn/BQSZuaiwZkdu+Z8rtl2IUISL0yNo+6RLrlObuUqA8 Uu5cf4XE4Tyklaw805JUI/1O/psMcpJBHr4cA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=K5QdhLV+eopIkl2+uwGyhRF0Uu/5wiGpUzStklvmUkI=; b=Mt0kepEcFLIg7mh6ctI5btd6kZxsTnA/d88KElbPsKU7wZJ82R4B0vMWKJpiJuVHOz ZM/Tiqlx4FcmH8v80NlkGNT0jhDKtYegDpZuguGhkuiT8eF0OxOqrQpiM3C7l3Lv/Uwo CgzCPYLVQ/o3xWnHd4xwQVuJypopTLda7vMwGWSG1zjdNBd7Z8l7uqHmekDHNR1Ky7Qk UiWSxuKEWi8OWR4stUyTU3MjJ59Wnj13TNXlmkLtUy79RfkhAJ4Ui1jpdXW/QAZgbT4A 1/RmjjOKoUeErxbCTlvbtv2EDCL+52sX8QfdWg9Bnj5etooOahVyU/ZaJ4xRlzp+vnaz PUpw== X-Gm-Message-State: ALKqPwe02p2aPbaPgo376765rRs6LwX1Xfc+NQ28QnwizfDYxMCBlFT6 D8bt4MQuETTmXukAlyXxxpZucTDrHacdGqO+N/BWlA== X-Received: by 2002:a6b:4014:: with SMTP id k20-v6mr5250988ioa.277.1527147369602; Thu, 24 May 2018 00:36:09 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a4f:78c9:0:0:0:0:0 with HTTP; Thu, 24 May 2018 00:36:08 -0700 (PDT) In-Reply-To: <3898620ef606004aaddc332591ca467f56773029.1526835466.git.sean.wang@mediatek.com> References: <3898620ef606004aaddc332591ca467f56773029.1526835466.git.sean.wang@mediatek.com> From: Linus Walleij Date: Thu, 24 May 2018 09:36:08 +0200 Message-ID: Subject: Re: [PATCH v1 1/7] dt-bindings: pinctrl: add external interrupt support to MT7622 pinctrl To: Sean Wang Cc: Rob Herring , Mark Rutland , Matthias Brugger , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , Linux ARM , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 20, 2018 at 7:01 PM, wrote: > From: Sean Wang > > Extend the capability of MT7622 pinctrl with adding EINT so that each > GPIO can be used to notify CPU when a signal state is changing on the > line as an external interrupt. > > Signed-off-by: Sean Wang Patch applied with Rob's review tag. Yours, Linus Walleij