Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp1911739imm; Thu, 24 May 2018 02:48:21 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoXfnFr/F92Yo9Ki0WMQtsZXrsnc2iESeRzzxOjFA30g5lHKS5oejy4a0/3uL7AOyOXj8NT X-Received: by 2002:a63:710b:: with SMTP id m11-v6mr5232265pgc.326.1527155301239; Thu, 24 May 2018 02:48:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527155301; cv=none; d=google.com; s=arc-20160816; b=ggm+F0rfzdaEXu0Urb/ra/jS1bzdBmdPHsLW2B6YrMnpVtDGHwpYZX1I8Siqad+wyQ LzG9wz0SthYGvFdYRIVTPPvRhPjoL73H9nta3i1xi0K5ZvNCQt75he8yMIuXUriDFFAd /gaU9PYB90OBf4ngKECLfqbqjRZ1Ahc7TKmc8nMSHBMJGSJE8SvLLSZ+hxH4CU7cKsLH ZDJk6S26ifA+rO6hSLXjhdnc5rZ/K5MoX511fAOUXSV+UZk72C5zqBb1DBiCokytD9sm jUTAfYvObgp69IkDa9KoFrHU+KStw7753TSLm8mPRiHElC3bWQrqpOVyJBL5pPTdUUX8 wC8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=p3YlXPmpN2xfyOz99/2eSGv8H+1q9aq3L2dv5ejfOb4=; b=ue12eb/9AEdQbgR4EbeZL7w9VC4Vxwq7Bic2UPOGtGNUBqP093LEsFNq/5xUz2AbPp lj5snl/wLHYH780DLayVwtIcQ3KKPE1Zhm0YqcioGP3dcmekyxQOFWN21l2CKnPQpfl+ jXgc0dic69U8k8bCT/BuFpxm1j1YD433SiAwYEURkV7wCY2bY3qhhFgS8tGLXgao2k8c /1Lz5giCmiRoszbHwA6mNcfYf0lTxfnlmd/XFlENJ3TUkLhaG3y0XKgSMgxMY4Rmirny Z5ovrlSZ16+CqRGeTaMa8dq+4nnTAFLPHBOTOSVsFLidKHGFuh65KFbFj9omprpF4e3s 4e/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ISap7IsJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y11-v6si21682454plt.455.2018.05.24.02.48.07; Thu, 24 May 2018 02:48:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ISap7IsJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966883AbeEXJqI (ORCPT + 99 others); Thu, 24 May 2018 05:46:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:57188 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966857AbeEXJqC (ORCPT ); Thu, 24 May 2018 05:46:02 -0400 Received: from localhost (LFbn-1-12247-202.w90-92.abo.wanadoo.fr [90.92.61.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 35B23208B6; Thu, 24 May 2018 09:46:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1527155161; bh=bgBgwoCPFU8JzxcSfHZSIgwy+e4xaMq8Ioe7bnxFT9Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ISap7IsJxjAZLyFyl0d86B5sZ8dWNHbdmH6lAZCbAAzWdCQbLZ2DpOAv310WnMp3D OPtXeT0+pCXbHKzSyLbA8jbaeJqwo+QJXFg6PN3tfyndBzjUQG7ZxgWqZWXxe472Ea cSVrHqjLqcvLxW3Kig66idYIVEO6zmy6/E9AkvJk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Greg Kroah-Hartman , Martin Schwidefsky , Vasily Gorbik Subject: [PATCH 4.4 76/92] s390: add assembler macros for CPU alternatives Date: Thu, 24 May 2018 11:38:53 +0200 Message-Id: <20180524093206.575196384@linuxfoundation.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180524093159.286472249@linuxfoundation.org> References: <20180524093159.286472249@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Martin Schwidefsky [ Upstream commit fba9eb7946251d6e420df3bdf7bc45195be7be9a ] Add a header with macros usable in assembler files to emit alternative code sequences. It works analog to the alternatives for inline assmeblies in C files, with the same restrictions and capabilities. The syntax is ALTERNATIVE "", \ "", \ "" and ALTERNATIVE_2 "", \ "", \ "", "", \ "" Reviewed-by: Vasily Gorbik Signed-off-by: Martin Schwidefsky Signed-off-by: Greg Kroah-Hartman --- arch/s390/include/asm/alternative-asm.h | 108 ++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 arch/s390/include/asm/alternative-asm.h --- /dev/null +++ b/arch/s390/include/asm/alternative-asm.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_S390_ALTERNATIVE_ASM_H +#define _ASM_S390_ALTERNATIVE_ASM_H + +#ifdef __ASSEMBLY__ + +/* + * Check the length of an instruction sequence. The length may not be larger + * than 254 bytes and it has to be divisible by 2. + */ +.macro alt_len_check start,end + .if ( \end - \start ) > 254 + .error "cpu alternatives does not support instructions blocks > 254 bytes\n" + .endif + .if ( \end - \start ) % 2 + .error "cpu alternatives instructions length is odd\n" + .endif +.endm + +/* + * Issue one struct alt_instr descriptor entry (need to put it into + * the section .altinstructions, see below). This entry contains + * enough information for the alternatives patching code to patch an + * instruction. See apply_alternatives(). + */ +.macro alt_entry orig_start, orig_end, alt_start, alt_end, feature + .long \orig_start - . + .long \alt_start - . + .word \feature + .byte \orig_end - \orig_start + .byte \alt_end - \alt_start +.endm + +/* + * Fill up @bytes with nops. The macro emits 6-byte nop instructions + * for the bulk of the area, possibly followed by a 4-byte and/or + * a 2-byte nop if the size of the area is not divisible by 6. + */ +.macro alt_pad_fill bytes + .fill ( \bytes ) / 6, 6, 0xc0040000 + .fill ( \bytes ) % 6 / 4, 4, 0x47000000 + .fill ( \bytes ) % 6 % 4 / 2, 2, 0x0700 +.endm + +/* + * Fill up @bytes with nops. If the number of bytes is larger + * than 6, emit a jg instruction to branch over all nops, then + * fill an area of size (@bytes - 6) with nop instructions. + */ +.macro alt_pad bytes + .if ( \bytes > 0 ) + .if ( \bytes > 6 ) + jg . + \bytes + alt_pad_fill \bytes - 6 + .else + alt_pad_fill \bytes + .endif + .endif +.endm + +/* + * Define an alternative between two instructions. If @feature is + * present, early code in apply_alternatives() replaces @oldinstr with + * @newinstr. ".skip" directive takes care of proper instruction padding + * in case @newinstr is longer than @oldinstr. + */ +.macro ALTERNATIVE oldinstr, newinstr, feature + .pushsection .altinstr_replacement,"ax" +770: \newinstr +771: .popsection +772: \oldinstr +773: alt_len_check 770b, 771b + alt_len_check 772b, 773b + alt_pad ( ( 771b - 770b ) - ( 773b - 772b ) ) +774: .pushsection .altinstructions,"a" + alt_entry 772b, 774b, 770b, 771b, \feature + .popsection +.endm + +/* + * Define an alternative between two instructions. If @feature is + * present, early code in apply_alternatives() replaces @oldinstr with + * @newinstr. ".skip" directive takes care of proper instruction padding + * in case @newinstr is longer than @oldinstr. + */ +.macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2 + .pushsection .altinstr_replacement,"ax" +770: \newinstr1 +771: \newinstr2 +772: .popsection +773: \oldinstr +774: alt_len_check 770b, 771b + alt_len_check 771b, 772b + alt_len_check 773b, 774b + .if ( 771b - 770b > 772b - 771b ) + alt_pad ( ( 771b - 770b ) - ( 774b - 773b ) ) + .else + alt_pad ( ( 772b - 771b ) - ( 774b - 773b ) ) + .endif +775: .pushsection .altinstructions,"a" + alt_entry 773b, 775b, 770b, 771b,\feature1 + alt_entry 773b, 775b, 771b, 772b,\feature2 + .popsection +.endm + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_S390_ALTERNATIVE_ASM_H */