Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp1982651imm; Thu, 24 May 2018 04:01:27 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoOBJoWl61QHYTup99EQe2AiJHNuDDg5PRBd27EkRHjqzlksE0jkDEGtnc48LdB8Wuh/y5A X-Received: by 2002:a62:12d4:: with SMTP id 81-v6mr6789671pfs.243.1527159686963; Thu, 24 May 2018 04:01:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527159686; cv=none; d=google.com; s=arc-20160816; b=myrHf9VSipEVKt4zALVkGJ5jStuJN5PpXWXX8WUgloMgqUVWJaY/y3ujkLzeQXjqL9 eYw1X7OoWATjTgNkv+IDwAFWhV3RIxKV2pA9zxu5OnZQ2MZje+o7WafTcHc03WqCj0Wq vwJMCVm+vwID41mgrAaGFEbwGG5QaCQy9zoFeChe7Dz1LBYuqgw3WlCw0beqiTqnErgC 4t0y9Ql28k7O7WZwMB5rOg7vUs3UEQ3Fo5JkE8oa6yPabzSVSrnU6Gvp43o0rkISGwD4 qjeVxSArT1uCGCp8qZjQpaUlWxyvYxui5r6CMO3/WM/tsAy4Gmn6hBNwEg2ea0fwptGE 5Riw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=xXZM+SI2dlCVbKrYLzQGoyA6pW2OyLL1pq3eXR+nMv8=; b=g3hqJ//Yvnt2ILTqbj1fbTJugHO9i6aPDHZOY2CeJdiWOstmLoyHtpz25qrO+RXf1p loAl8d0LFSn6ERuLPutMMvnjYpHDt3WNRF3YZc34kFNe6XKoIo16KclWNL00nMSLN7fu L4uVrSYbQ7kItJC/F0RlBl1h5HQy91uB0V8p6IXxA7mdPVgu8HABfRuUpFSYdYClvwcM hO+sHWE2fqUddF8qcllW4bs3TcL29IMJtvdyMTfaRdYJqjlhjoxC4K7rS8FFQgyUr7x2 iyYwHVCykWyB6B0N1WvC1QFKaMmOxChEro4ufJgUhw6Ms4kvBJzN1ZRtGoF+8vRRyb4J KTGQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i125-v6si11573409pgc.88.2018.05.24.04.01.11; Thu, 24 May 2018 04:01:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032744AbeEXK71 (ORCPT + 99 others); Thu, 24 May 2018 06:59:27 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:40958 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030373AbeEXK7U (ORCPT ); Thu, 24 May 2018 06:59:20 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B5AF3168F; Thu, 24 May 2018 03:59:19 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 865603F25D; Thu, 24 May 2018 03:59:19 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 83CEC1AE386A; Thu, 24 May 2018 11:59:47 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, mingo@kernel.org, linux-arm-kernel@lists.infradead.org, yamada.masahiro@socionext.com, Will Deacon Subject: [PATCH 4/9] openrisc: Don't pull in all of linux/bitops.h in asm/cmpxchg.h Date: Thu, 24 May 2018 11:59:41 +0100 Message-Id: <1527159586-8578-5-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1527159586-8578-1-git-send-email-will.deacon@arm.com> References: <1527159586-8578-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The openrisc implementation of asm/cmpxchg.h pulls in linux/bitops.h so that it can refer to BITS_PER_BYTE. It also transitively relies on this pulling in linux/compiler.h for READ_ONCE. Replace the #include with linux/bits.h and linux/compiler.h Signed-off-by: Will Deacon --- arch/openrisc/include/asm/cmpxchg.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/openrisc/include/asm/cmpxchg.h b/arch/openrisc/include/asm/cmpxchg.h index d29f7db53906..f9cd43a39d72 100644 --- a/arch/openrisc/include/asm/cmpxchg.h +++ b/arch/openrisc/include/asm/cmpxchg.h @@ -16,8 +16,9 @@ #ifndef __ASM_OPENRISC_CMPXCHG_H #define __ASM_OPENRISC_CMPXCHG_H +#include +#include #include -#include #define __HAVE_ARCH_CMPXCHG 1 -- 2.1.4