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[209.132.180.67]) by mx.google.com with ESMTP id 205-v6si14507331pgf.604.2018.05.24.19.25.30; Thu, 24 May 2018 19:25:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033453AbeEXQDK (ORCPT + 99 others); Thu, 24 May 2018 12:03:10 -0400 Received: from esa6.microchip.iphmx.com ([216.71.154.253]:20663 "EHLO esa6.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033434AbeEXQDB (ORCPT ); Thu, 24 May 2018 12:03:01 -0400 X-IronPort-AV: E=Sophos;i="5.49,436,1520924400"; d="scan'208";a="11878038" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 24 May 2018 09:03:00 -0700 Received: from [10.145.4.57] (10.10.76.4) by chn-sv-exch04.mchp-main.com (10.10.76.105) with Microsoft SMTP Server id 14.3.352.0; Thu, 24 May 2018 09:02:59 -0700 Subject: Re: [PATCH v3 5/6] spi: at91-usart: add driver for at91-usart as spi To: Mark Brown CC: Andy Shevchenko , devicetree , "open list:SERIAL DRIVERS" , Linux Kernel Mailing List , linux-arm Mailing List , linux-spi , Mark Rutland , Rob Herring , Lee Jones , Greg Kroah-Hartman , Jiri Slaby , Richard Genoud , , Nicolas Ferre References: <20180511103822.31698-1-radu.pirea@microchip.com> <20180511103822.31698-6-radu.pirea@microchip.com> <5a3930b867cf8c279953d08c5d5dd1d93113a43b.camel@microchip.com> <20180517045437.GE20254@sirena.org.uk> From: Radu Pirea Message-ID: <0e6e71e2-f8ac-7889-0d81-8d8a4c15223d@microchip.com> Date: Thu, 24 May 2018 19:04:11 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20180517045437.GE20254@sirena.org.uk> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/17/2018 07:54 AM, Mark Brown wrote: > On Tue, May 15, 2018 at 12:22:24PM +0300, Radu Pirea wrote: >> On Mon, 2018-05-14 at 20:38 +0300, Andy Shevchenko wrote: > >>> So, what is not going as expected in "SPI core takes care of CSs" >>> case? >>> Did you use oscilloscope for that? > >> Yes, I used and CSs was not asserted. Anyway, I will will try again. > > If the core chip select handling is not working properly for some reason > then the core chip select handling should be fixed rather than just open > coding in your driver - probably it's also broken for other users. > Hi Mark, I found the fix for cs-gpios. If I change spi_add_device function like this(see below) everything is ok. int spi_add_device(struct spi_device *spi) ... if (ctlr->cs_gpios){ spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; if(gpio_is_valid(spi->cs_gpio)) gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); } ... return status; } In the subsystem gpio direction of pins is never set and gpio_set_value() don't set the direction. In my opinion gpio_direction_output() set direction should be called in spi_add_device. What do you think? Is ok?