Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp2956256imm; Thu, 24 May 2018 19:51:56 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo+TuED9sH1qYhGK6+fZcVWa6FRlpLvF8l627x/co/5bTWHASsy0r7RmDUUgDq480PTu/tN X-Received: by 2002:a17:902:8a87:: with SMTP id p7-v6mr641582plo.278.1527216716718; Thu, 24 May 2018 19:51:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527216716; cv=none; d=google.com; s=arc-20160816; b=MR2wM+kX/MztQj46I2SawlC94FAHKyXimqd6obR2zKxtD9gOJYxxKlWdVMoaeZzuZU aHNa97oNxjYOBLvwDcnMg5PlnPcXNnocxBZM93xaTPj5SccEmgyqPmQxPF+SXyFOSYVC UtkIFoBd16plVsq+t0BVCCCle2dLTFLpZxQmtC1X7E5UcZoeGbzGQuhFhvdC4E64qEMH te4ApIwvS1VfCyMj2mBtncfZOmT+msCtIkJtnBdhqRHJtqSMwmKb+fhP48WWVGPn1wSa oe3/SQx2AASQpw+BvGVSI+aEAVEb615BOFaF2kUY4ouIS8mr3NbTR3ATYqayWZnFEMNw IzyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=VsPl1VCHa8RQR4xiInIcGdFiQKJXnyb7xCsVjXAhFEY=; b=Hv7zexPkys3Gr15og3G6tkDjvWWbpkFRw9icgTZjZU+tbHvlcXgMPY+XR69JZJ82nt ANvjqRPUz7sb/8xRBrHSZ0iWdc6iHJEGKOwccnpTs+qyPuPaj1pPjKqe/SP4Q5cfER8j tEoIgqoNqBjLSZeEWoyLQHNIP7lZtsJL074kprcBS9Wv6aVgi7MZvmbgbeT/l1uZpp72 LaKaPsj7tpngMS+iQizn2L2XqHYqkm01Ypfe4JA2SmZq7EO8LllMKIvl34b9XnqpfymD WWuHo3TB2A/ADYzpZdpCvzMMoqq3KLFF3bUIRt9H5INitpnKl/hQ0jY5GbdNoy7eovni +VIQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k4-v6si17759001pgp.74.2018.05.24.19.51.42; Thu, 24 May 2018 19:51:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965115AbeEYCe7 (ORCPT + 99 others); Thu, 24 May 2018 22:34:59 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:43559 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S935861AbeEYCek (ORCPT ); Thu, 24 May 2018 22:34:40 -0400 X-UUID: 64b3cb9be63e4e06893cf2930827b89d-20180525 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1045285984; Fri, 25 May 2018 10:34:39 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 25 May 2018 10:34:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 25 May 2018 10:34:37 +0800 From: To: CK Hu , Philipp Zabel CC: David Airlie , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , Stu Hsieh Subject: [PATCH v3 6/8] drm/mediatek: add ddp component PWM2 Date: Fri, 25 May 2018 10:34:23 +0800 Message-ID: <1527215665-11937-7-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527215665-11937-1-git-send-email-stu.hsieh@mediatek.com> References: <1527215665-11937-1-git-send-email-stu.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stu Hsieh This patch add component PWM2 Signed-off-by: Stu Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index 9b19fc4423f1..e00c2e798abd 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -56,6 +56,7 @@ enum mtk_ddp_comp_id { DDP_COMPONENT_OVL1, DDP_COMPONENT_PWM0, DDP_COMPONENT_PWM1, + DDP_COMPONENT_PWM2, DDP_COMPONENT_RDMA0, DDP_COMPONENT_RDMA1, DDP_COMPONENT_RDMA2, -- 2.12.5