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[209.132.180.67]) by mx.google.com with ESMTP id b190-v6si18661511pgc.18.2018.05.25.02.52.54; Fri, 25 May 2018 02:53:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966305AbeEYJvD (ORCPT + 99 others); Fri, 25 May 2018 05:51:03 -0400 Received: from foss.arm.com ([217.140.101.70]:57658 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966242AbeEYJuw (ORCPT ); Fri, 25 May 2018 05:50:52 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 480F81596; Fri, 25 May 2018 02:50:52 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F17B63F25D; Fri, 25 May 2018 02:50:49 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Thierry , Thomas Gleixner , Jason Cooper Subject: [PATCH v4 23/26] irqchip/gic: Add functions to access irq priorities Date: Fri, 25 May 2018 10:49:29 +0100 Message-Id: <1527241772-48007-24-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> References: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add accessors to the GIC distributor/redistributors priority registers. Signed-off-by: Julien Thierry Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier --- drivers/irqchip/irq-gic-common.c | 10 ++++++++++ drivers/irqchip/irq-gic-common.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index 01e673c..910746f 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -98,6 +98,16 @@ int gic_configure_irq(unsigned int irq, unsigned int type, return ret; } +void gic_set_irq_prio(unsigned int irq, void __iomem *base, u8 prio) +{ + writeb_relaxed(prio, base + GIC_DIST_PRI + irq); +} + +u8 gic_get_irq_prio(unsigned int irq, void __iomem *base) +{ + return readb_relaxed(base + GIC_DIST_PRI + irq); +} + void gic_dist_config(void __iomem *base, int gic_irqs, void (*sync_access)(void)) { diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index 3919cd7..1586dbd 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -35,6 +35,8 @@ void gic_dist_config(void __iomem *base, int gic_irqs, void gic_cpu_config(void __iomem *base, void (*sync_access)(void)); void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data); +void gic_set_irq_prio(unsigned int irq, void __iomem *base, u8 prio); +u8 gic_get_irq_prio(unsigned int irq, void __iomem *base); void gic_set_kvm_info(const struct gic_kvm_info *info); -- 1.9.1