Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp3277656imm; Fri, 25 May 2018 02:57:39 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoSq+usRn/cI6eW3NVEglYwTGajooSi5Tks6N27Kusu/VMIXorS2Sxs1ug5FTV9sCL/ao+Q X-Received: by 2002:a65:4586:: with SMTP id o6-v6mr1404098pgq.197.1527242259635; Fri, 25 May 2018 02:57:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527242259; cv=none; d=google.com; s=arc-20160816; b=kuhOfJ5pqzjP4sDokJ/CCk12vPxLBgh2TQJXD67WxtNozf9fbtq/kZPN7qFgMz3m4+ 81UDCwC9/Imp/ZJNoLCIPJfJX9hgUdl9yWa+B/RurYYwwW+RlHhrZoO0xHhe0O1YRPiz eWy7tk7ZOpUWxKpx6jG+n+0N/6OleR9+iySJmQaKl5EnHChnu3jTs4i9s4RGFkBh0L1j fv23x8RrsFaukagRC+PDyc02JPWgRzJVSjmQm9l2wI/q7T3le30Z0IQSRhiQoQXF4sz4 ek12Go1nuVIyFESSSHq+6WsEZsKFK7vVyZ3HSC9l22X901/ft1Jv4nFV0Zi+ynyzuQPO 8tng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=he05QVknS2PuG6mjru+qj+aHmnvEjaERrf5w9X5hfKM=; b=JBnFOzgvx9VMIFCr7qqIy+9nvCNT6wd+pkWI/bWCUOnhYtKb7dBqrFfw+J9VD3X9jo 1baPLqYm7e0DZJYCE7Q+qgYcBwNxhRI2thECZcYSZaZUHylratFxF7rVTcMr3fG1CcUj BEvIYnwStoDNey+QlO0S5tyl8Qea/N9VlLZ3tDvb0dMZQ90l8yX9UmqlTZfAKSrSnTOu mLDsSqzkLq5CWtU116GS829pj/NLaVZt8/2ULxQHyCjDgYjdyisqcQYNabSPhxVrKCI3 8/BbvkedbGH/fOWvLu+0/nlJ3O/1a8z0ASuGIL6d9Lx6vJ6fl1ROsmRS4PK6DuLoLEeb 4iDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n3-v6si4636476pga.622.2018.05.25.02.57.24; Fri, 25 May 2018 02:57:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965906AbeEYJuM (ORCPT + 99 others); Fri, 25 May 2018 05:50:12 -0400 Received: from foss.arm.com ([217.140.101.70]:57454 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965681AbeEYJuK (ORCPT ); Fri, 25 May 2018 05:50:10 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9F5F216EA; Fri, 25 May 2018 02:50:10 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 953C23F25D; Fri, 25 May 2018 02:50:08 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Thierry Subject: [PATCH v4 06/26] irqchip/gic: Lower priority of GIC interrupts Date: Fri, 25 May 2018 10:49:12 +0100 Message-Id: <1527241772-48007-7-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> References: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current value used for IRQ priorities is high among the non-secure interrupt priority values. Lower the default priority of interrupts so there is more flexibility to define higher priority interrupts. Signed-off-by: Julien Thierry Suggested-by: Daniel Thompson Cc: Marc Zyngier --- include/linux/irqchip/arm-gic-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/irqchip/arm-gic-common.h b/include/linux/irqchip/arm-gic-common.h index 9a1a479..2c9a4b3 100644 --- a/include/linux/irqchip/arm-gic-common.h +++ b/include/linux/irqchip/arm-gic-common.h @@ -13,7 +13,7 @@ #include #include -#define GICD_INT_DEF_PRI 0xa0 +#define GICD_INT_DEF_PRI 0xc0 #define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\ (GICD_INT_DEF_PRI << 16) |\ (GICD_INT_DEF_PRI << 8) |\ -- 1.9.1