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[209.132.180.67]) by mx.google.com with ESMTP id d124-v6si23437696pfc.176.2018.05.25.02.58.42; Fri, 25 May 2018 02:58:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965790AbeEYJ4x (ORCPT + 99 others); Fri, 25 May 2018 05:56:53 -0400 Received: from foss.arm.com ([217.140.101.70]:57422 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965455AbeEYJuD (ORCPT ); Fri, 25 May 2018 05:50:03 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 75A10168F; Fri, 25 May 2018 02:50:03 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F10C83F25D; Fri, 25 May 2018 02:50:00 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Thierry , Suzuki K Poulose , Marc Zyngier , Christoffer Dall Subject: [PATCH v4 03/26] arm64: cpufeature: Use alternatives for VHE cpu_enable Date: Fri, 25 May 2018 10:49:09 +0100 Message-Id: <1527241772-48007-4-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> References: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cpu_enable callback for VHE feature requires all alternatives to have been applied. This prevents applying VHE alternative separately from the rest. Use an alternative depending on VHE feature to know whether VHE alternatives have already been applied. Signed-off-by: Julien Thierry Cc: Catalin Marinas Cc: Will Deacon Cc: Suzuki K Poulose Cc: Marc Zyngier Cc: Christoffer Dall --- arch/arm64/kernel/cpufeature.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index a177104..a3a5585d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1013,6 +1013,8 @@ static bool runs_at_el2(const struct arm64_cpu_capabilities *entry, int __unused static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused) { + u64 tmp = 0; + /* * Copy register values that aren't redirected by hardware. * @@ -1021,8 +1023,15 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused) * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to * do anything here. */ - if (!alternatives_applied) - write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); + asm volatile(ALTERNATIVE( + "mrs %0, tpidr_el1\n" + "msr tpidr_el2, %0", + "nop\n" + "nop", + ARM64_HAS_VIRT_HOST_EXTN) + : "+r" (tmp) + : + : "memory"); } #endif -- 1.9.1