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[209.132.180.67]) by mx.google.com with ESMTP id r2-v6si18645418pgd.517.2018.05.25.06.00.48; Fri, 25 May 2018 06:01:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=UE3SG3oL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934265AbeEYNAO (ORCPT + 99 others); Fri, 25 May 2018 09:00:14 -0400 Received: from mail-yb0-f193.google.com ([209.85.213.193]:35437 "EHLO mail-yb0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933152AbeEYNAL (ORCPT ); Fri, 25 May 2018 09:00:11 -0400 Received: by mail-yb0-f193.google.com with SMTP id y3-v6so1802175ybb.2; Fri, 25 May 2018 06:00:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=baffZGNT8tMcRjB7NeEKf4JaL/AoiWQ6kGlce6Jg+Y0=; b=UE3SG3oLUFY+TLijsgk7qydih0eZx7ihXsLr/iZfk/w6XE3OfcbSV0Ocb4lMdy4n05 Ovu1rAC/uXWJyWDHDVEdLfzLxL8RWbZwy722xwXml3ChIOB968dQszXXvBMeaFly7jWo uVst+UUSlXI2H07hlfKCmtSSoFYIJRiXv3RtX9sNZjeAnIutux+E9Ej8P5cdc+UZbA1j I+LQ+fQdgizKmA0oEBj/vLAXbQkrUxx8f3bSXgIC4vDBfh/wR+UOdaiOqTYf2++UtHxt dTl5yqjE912/QuJEbZrJGpcC6IciOgcmg6E9MrLVflTDDLe90QNpSB7ccHRekOfeMksR vWzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=baffZGNT8tMcRjB7NeEKf4JaL/AoiWQ6kGlce6Jg+Y0=; b=T8nzP+OFq0bi6ncWL9hJ/V4h2REnAjZNKcRp7R2Fw9WNx8gmDJ5mylGajXy7sCz/Jc 7c1i25dXzWl317rTt670cQknoEVd4uV5CqHdaY3ukmxGMbThe9H27f4LSa+dHCW+4vyh G/6ZF0vtKfu93f3mpQm+vMavojurKKul6fjVRRHHQ7q6h3lqrL4nG+tIzuIGjgAsuv0L WxeWzSHCVyB/eOK9iyCTr9vCMXp1zhS2tUrWhXkqBCUtLu8VJdwZXBZkzq34oeDGM5OD Uv9Sd8eEo9PHXonar8bQR241PHS2TbluY6YvoC4okhT2gXyminaDFolINDr4Aj6lRucs jmoA== X-Gm-Message-State: ALKqPwd1TN9AlQPXg/LotKQvrRDb3B8x1itGZZsmijac/x/BjZYI/9t3 63Lu/0Mgmju0oxVK+EWKAk0= X-Received: by 2002:a25:9188:: with SMTP id w8-v6mr1235858ybl.83.1527253210916; Fri, 25 May 2018 06:00:10 -0700 (PDT) Received: from sophia ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id a127-v6sm300074ywc.29.2018.05.25.06.00.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 06:00:10 -0700 (PDT) Date: Fri, 25 May 2018 09:00:04 -0400 From: William Breathitt Gray To: Fabrice Gasnier Cc: Jonathan Cameron , benjamin.gaignard@st.com, "linux-iio@vger.kernel.org" , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 3/9] docs: Add Generic Counter interface documentation Message-ID: <20180525130004.GA3751@sophia> References: <20180520163109.22b11af8@archlinux> <20180521134729.GB5723@sophia> <20180522180805.2b61f0ed@archlinux> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 25, 2018 at 11:26:11AM +0200, Fabrice Gasnier wrote: >On 05/22/2018 07:08 PM, Jonathan Cameron wrote: >>>>> +* Quadrature x2 Rising: >>>>> + Rising edges on either quadrature pair signals updates the respective >>>>> + count. Quadrature encoding determines the direction. >>>> This one I've never met. Really? There are devices who do this form >>>> of crazy? It gives really uneven counting and I'm failing to see when >>>> it would ever make sense... References for these odd corner cases >>>> would be good. >>>> >>>> >>>> __|---|____|-----|____ >>>> ____|----|____|-----|____ >>>> >>>> 001122222223334444444 >>> That's the same reaction I had when I discovered this -- in fact the >>> STM32 LP Timer is the first time I've come across such a quadrature >>> mode. I'm not sure of the use case for this mode, because positioning >>> wouldn't be precise as you've pointed out. Perhaps Fabrice or Benjamin >>> can probe the ST guys responsible for this design choice to figure out >>> the rationale. >> Hmm. My inclination would be to not support it unless someone can up >> with a meaningful use. We are adding ABI (be it not much) for a case >> that to us makes no sense. > >Hi Jonathan, William, > >Sorry for the late reply. To follow your advise, we can probably drop >this for now. I think simple counter, or quadrature x4 will be mostly >used for now. As you pointed out, there's not much ABI for x2 >rising/falling cases. It will not be a big deal to add it later if needed. > >I can help to update (remove & test) this in LP-Timer counter driver if >you wish. > >Please let me know, > >Thanks, >Fabrice All right, let's postpone the COUNT_FUNCTION_QUADRATURE_X2_RISING and COUNT_FUNCTION_QUADRATURE_X2_FALLING modes for now. Fabrice, send me over an update patch removing these modes from the LP-Timer counter driver and I'll squash it in with the next patchset revision. I'll keep the rest of the quadrature modes the same as they are used in the other counter drivers as well (with the remaining "Quadrature x1 B" staying to complete the pattern) and I've seen real world use cases for each: * COUNT_FUNCTION_QUADRATURE_X1_A * COUNT_FUNCTION_QUADRATURE_X1_B * COUNT_FUNCTION_QUADRATURE_X2_A * COUNT_FUNCTION_QUADRATURE_X2_B Adding support in the future for "Quadrature x2 Rising" and "Quadrature x2 Falling" will be trivial, so really the main requirement in order to bring these modes back is to provide reasonable use cases for them. My suspicion is that there was some rationale for these Quadrature x2 modes in the STM32 LP-Timer -- afterall, why else would the engineers go through the trouble of designing and implementing it -- but until that use case is clear, it's best to wait on changing the Generic Counter ABI lest we end up with an interface that is never used in the real world. William Breathitt Gray > >> >> Looks rather like the sort of thing that is a side effect of the >> implementation rather than deliberate. >> >>> I'm leaving in these modes for now, as they do exist in the STM32 LP >>> Timer, but it does make me curious what the intentions for them were >>> (perhaps use cases outside of traditional quadrature encoder >>> positioning). >>> >> Sure if there is a usecase then fair enough. >> >> Jonathan >> >>