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[209.132.180.67]) by mx.google.com with ESMTP id b6-v6si24405728plx.211.2018.05.26.01.46.00; Sat, 26 May 2018 01:46:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031552AbeEZIoY (ORCPT + 99 others); Sat, 26 May 2018 04:44:24 -0400 Received: from mail.bootlin.com ([62.4.15.54]:35900 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031385AbeEZInN (ORCPT ); Sat, 26 May 2018 04:43:13 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id EDA8420750; Sat, 26 May 2018 10:43:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from xps13 (unknown [37.169.55.10]) by mail.bootlin.com (Postfix) with ESMTPSA id D036C20731; Sat, 26 May 2018 10:43:00 +0200 (CEST) Date: Sat, 26 May 2018 10:42:59 +0200 From: Miquel Raynal To: Abhishek Sahu Cc: Boris Brezillon , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja Subject: Re: [PATCH v3 05/16] mtd: rawnand: qcom: remove dt property nand-ecc-step-size Message-ID: <20180526104259.210d96fc@xps13> In-Reply-To: <1527250904-21988-6-git-send-email-absahu@codeaurora.org> References: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> <1527250904-21988-6-git-send-email-absahu@codeaurora.org> Organization: Bootlin X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Abhishek, On Fri, 25 May 2018 17:51:33 +0530, Abhishek Sahu wrote: > QCOM NAND controller supports only one step size (512) so > nand-ecc-step-size DT property is redundant. This property > can be removed and ecc step size can be assigned with 512 value. > > Signed-off-by: Abhishek Sahu > --- > * Changes from v2: > > NEW CHANGE > > 1. Removed the custom logic and used the helper fuction. > drivers/mtd/nand/raw/qcom_nandc.c | 11 ++--------- > 1 file changed, 2 insertions(+), 9 deletions(-) > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c > index b554fb6..b538390 100644 > --- a/drivers/mtd/nand/raw/qcom_nandc.c > +++ b/drivers/mtd/nand/raw/qcom_nandc.c > @@ -2325,15 +2325,8 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host) > bool wide_bus; > int ecc_mode = 1; > > - /* > - * the controller requires each step consists of 512 bytes of data. > - * bail out if DT has populated a wrong step size. > - */ > - if (ecc->size != NANDC_STEP_SIZE) { > - dev_err(nandc->dev, "invalid ecc size\n"); > - return -EINVAL; > - } > - > + /* controller only supports 512 bytes of data in each step */ "512 bytes data steps" > + ecc->size = NANDC_STEP_SIZE; > wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false; > > if (ecc->strength >= 8) { Once corrected: Acked-by: Miquel Raynal