Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp1494471imm; Sun, 27 May 2018 08:18:08 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrY7C/Lh4XBVZfvKYz1aZ5X6HLVp7aYPHNMNFR2Wr/sxTTcToffNLFv6+BFG8HMkjX/gTjE X-Received: by 2002:a17:902:20c9:: with SMTP id v9-v6mr10248748plg.206.1527434288513; Sun, 27 May 2018 08:18:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527434288; cv=none; d=google.com; s=arc-20160816; b=HRH+LkwLc49bzVyOcWqdp3JBPBRXN3QyvLD1k58LOu3cl07W/NLcAfBoT341CHDzFX oapcZyCRkD5YZR8ZlTp1m3tsEnxRdv4Flww9tppyCDiLn12Q5SWTKq3DElXhJ0OE6QJM WZ4OSqnN5duDlprLFNtT0XMSvs9PmG4EYRVpW4q7SOMJn49aNNoaYPoEVGdHRBuaaWF4 PYb3rLJvQpRuDv0Ceos3vrxJKj23H9FTeZQ3hIAoJmpq7+9qJtsu+v6YlZkPf04o8jeh U7zBOP+lSqTqrIDU61N3AAXPO11YYv07ylvva6ID3Mrsf78E69xGV3MvLBrjlW1/+Vc1 Oaag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date :arc-authentication-results; bh=trtSCsNmWZbLgefVn3OD3g4d/KYv8XEh0PDeHOcI09E=; b=q9wWxwH49q+1KQB00u2f9E1GQryXhm6+pPBT+nrwvzwxdsj1z0srfOmhqX31c1fs/d SgjyraDpvFA6NwsKLQrXBH8wmKf+6fARjUsq4sPnWdaerT07jCscknvL3z9GA+Gpsv7h OuQs/hnfMT+soQLS3jNajuAzUPjlHtjG5Zr47MqD2X76mGr5KXVx4f7QqpaYMFxoGCTq lQwsfE6HjaC+q2yCQeyjwdduZ0+540rjECPWF2Qwyy+W8iI3IooxW/bz/D/GajpEmtpl Upv0f8V0QCX+8iRNJ/mv0xlzwB4gm5UqI5z/kKzySyBClHWsmHvQNwtpBpMw2NBHkn8c xsRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v64-v6si1125167pfj.292.2018.05.27.08.17.23; Sun, 27 May 2018 08:18:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032769AbeE0PNn convert rfc822-to-8bit (ORCPT + 99 others); Sun, 27 May 2018 11:13:43 -0400 Received: from mail.bootlin.com ([62.4.15.54]:51613 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032595AbeE0PNl (ORCPT ); Sun, 27 May 2018 11:13:41 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id A0E5A20750; Sun, 27 May 2018 17:13:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id 1887E20376; Sun, 27 May 2018 17:13:39 +0200 (CEST) Date: Sun, 27 May 2018 17:13:37 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Stefan Agner , Benjamin Lindqvist , dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, thierry.reding@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, Lucas Stach , richard@nod.at, marcel@ziswiler.com, krzk@kernel.org, digetx@gmail.com, jonathanh@nvidia.com, pdeschrijver@nvidia.com, pgaikwad@nvidia.com, Mirza Krak , linux-mtd@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RESEND PATCH 2/5] mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver Message-ID: <20180527171337.002eeb9f@bbrezillon> In-Reply-To: <20180527161832.1152be6e@xps13> References: <86fdf19ec92b732709732fb60199f16488b4b727.1526990589.git.stefan@agner.ch> <20180524135335.6aa0b7a4@bbrezillon> <146a3abbbff4dcef30ad662a0fb85ff1@agner.ch> <20180527161832.1152be6e@xps13> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 27 May 2018 16:18:32 +0200 Miquel Raynal wrote: > Hi Stefan, > > On Thu, 24 May 2018 14:19:18 +0200, Stefan Agner > wrote: > > > On 24.05.2018 13:53, Boris Brezillon wrote: > > > Hi Benjamin, > > > > > > On Thu, 24 May 2018 13:30:14 +0200 > > > Benjamin Lindqvist wrote: > > > > > >> Hi Stefan, > > >> > > >> It seems to me that a probe similar to what the BootROM does shouldn't > > >> be awfully complicated to implement - just cycle through the switch > > >> cases in case of an ECC error. But I guess that's more of an idea for > > >> further improvements rather than a comment to the patch set under > > >> review. > > > > > > Nope, not really an option, because you're not guaranteed that the NAND > > > will be used as a boot media, and the first page or first set of pages > > > might just be erased. > > > > > > > Yeah I did not meant probing like the Boot ROM does. > > > > What I meant was using only the ECC modes which are supported by the > > Boot ROM when the driver tries to choose a viable mode. So that would > > be: > > - RS t=4 > > - BCH t=8 > > - BCH t=16 > > > > Maybe we could add a property to enable that behavior: > > > > tegra,use-bootable-ecc-only; > > I'm not sure a property is needed. > > As there is currently no official user of this driver, why not turning > mandatory the nand-ecc-xxx properties? Not a big fan of this solution. We already have a few cases where the NAND part was changed on a design and the new NAND had different ECC requirements, With your suggestion, that means creating a new .dts file for each possible NAND part. Note that having a solution that picks the best ECC config based on chip->ecc_xxx_ds should be the preferred approach. nand-ecc- props are mainly here to address the case where you need/want to assign a config that does not match the ECC requirements exposed by the chip. > In the documentation you can add > a note saying that using other algorithms than the three above is not > supported by the BootROM. > > > > > >> > > >> However, I think that allowing for an override of the oobsize > > >> inference would be a good idea before merging, no? This could just be > > >> a trivial #ifdef (at least temporarily). If you agree but don't feel > > >> like doing it yourself, I'd be happy to pitch in. Let me know. > > > > > > That's why we have nand-ecc-xxx properties in the DT. > > > > > > > Yes, nand-ecc-strength is the first thing I plan to implement, that way > > strength can be defined in dt. > > > > -- > > Stefan > > Thanks, > Miquèl