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[209.132.180.67]) by mx.google.com with ESMTP id c27-v6si26434pgn.320.2018.05.28.02.17.29; Mon, 28 May 2018 02:17:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@verge.net.au header.s=mail header.b=C28d0/6B; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754200AbeE1JPj (ORCPT + 99 others); Mon, 28 May 2018 05:15:39 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:56388 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753984AbeE1JPf (ORCPT ); Mon, 28 May 2018 05:15:35 -0400 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id DAC6425B7C5; Mon, 28 May 2018 19:15:32 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1527498933; bh=+C75ttQ7Qr1de37CGU5ke9+tzTSvMTc7e56dI8fX/4o=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=C28d0/6BeZ9RSBiE0w9iqSHMiyga4fmHDdQWPIR2LqXgViV+kx1K4DnN4SLrdV0pb JrGwZhE1bFcNaBNmQp9CccHHIKozK1VXvg4XRn3eyMtBB3rwNco7Q41Xcu9iFbwymc 6du5GNuNAT0Twf/NvNsQCfHMJkeTIAxAxlA7mVcI= Received: by reginn.horms.nl (Postfix, from userid 7100) id B4E0A94053F; Mon, 28 May 2018 11:15:30 +0200 (CEST) Date: Mon, 28 May 2018 11:15:30 +0200 From: Simon Horman To: Geert Uytterhoeven Cc: Michel Pollet , Linux-Renesas , Phil Edworthy , Michel Pollet , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Geert Uytterhoeven , linux-clk , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List Subject: Re: [PATCH v7 3/5] ARM: dts: Renesas R9A06G032 base device tree file Message-ID: <20180528091529.xno3o4nt7k7cenmy@verge.net.au> References: <1527154169-32380-1-git-send-email-michel.pollet@bp.renesas.com> <1527154169-32380-4-git-send-email-michel.pollet@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 25, 2018 at 11:27:46AM +0200, Geert Uytterhoeven wrote: > Hi Michel, > > On Thu, May 24, 2018 at 11:28 AM, Michel Pollet > wrote: > > This adds the Renesas R9A06G032 bare bone support. > > > > This currently only handles generic parts (gic, architected timer) > > and a UART. > > > > Signed-off-by: Michel Pollet > > Thanks for your patch! > > > --- /dev/null > > +++ b/arch/arm/boot/dts/r9a06g032.dtsi > > > + soc { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + interrupt-parent = <&gic>; > > + ranges; > > + > > + sysctrl: sysctrl@4000c000 { > > system-controller@ > > > + compatible = "renesas,r9a06g032-sysctrl"; > > + reg = <0x4000c000 0x1000>; > > + status = "okay"; > > + #clock-cells = <1>; > > + }; > > With the minor nit above resolved, and pending acceptance of the > sysctrl bindings: > > Reviewed-by: Geert Uytterhoeven Thanks. I have marked this patch, and the following one, as deferred pending acceptance of those bindings. Please repost or otherwise ping me once that has happened.